| Rev |
Age |
Author |
Path |
Log message |
Diff |
| 4055 |
5544 d 11 h |
trochtova |
/branches/dd/ |
changes in trunk (rev 4054) merged into dd branch |
|
| 3022 |
5827 d 13 h |
decky |
/branches/dd/ |
device drivers branch |
|
| 2141 |
6256 d 0 h |
jermar |
/trunk/ |
The Ultimate Solution To Illegal Virtual Aliases.
It is better to avoid them completely than to fight them.
Switch the sparc64 port to 16K pages. The TLBs and TSBs
continue to operate with 8K pages only. Page tables and
other generic parts operate with 16K pages.
Because the MMU doesn't support 16K directly, each 16K
page is emulated by a pair of 8K pages. With 16K pages,
illegal aliases cannot be created in 16K D-cache. |
|
| 2105 |
6312 d 11 h |
decky |
/trunk/kernel/ |
move ipc structures to ipc.h |
|
| 2089 |
6314 d 10 h |
decky |
/trunk/ |
huge type system cleanup
remove cyclical type dependencies across multiple header files
many minor coding style fixes |
|
| 2071 |
6325 d 3 h |
jermar |
/trunk/ |
(c) versus (C) |
|
| 2048 |
6357 d 4 h |
jermar |
/trunk/ |
Formatting and indentation changes. |
|
| 2007 |
6372 d 1 h |
jermar |
/trunk/kernel/ |
Introduce page colors. So far, only sparc64 uses correct page color bits. Other architectures have a dummy define
specifying zero bits for a page color.
There is a new check of page color in as_area_share(). Because of lack of support for this in the userspace, the
check has been #ifef'ed out. |
|
| 1978 |
6386 d 3 h |
jermar |
/trunk/ |
sparc64 code to support physical memory that starts on non-zero addresses.
Still needs to be tested on systems with such setup. |
|
| 1857 |
6465 d 8 h |
jermar |
/trunk/kernel/arch/sparc64/ |
sparc64 work.
More bits needed to reach the userspace milestone were added.
The preemptible_handler(), still a prototype, now contains all functionality it needs.
Some sanitation was added to functions expecting page-aligned pointers to
userspace window buffer. |
|
| 1822 |
6494 d 12 h |
jermar |
/trunk/ |
sparc64 work.
1. Formatting fixes.
2. When writing to DMMU ASI's, simple membar() can be used in place of flush().
3. Substantial changes in the way the TLB is taken over.
4. Remove unneeded functions.
This is the first revision that also runs on a real world Ultra 5 with UltraSPARC IIi
processor.
Note that 3. needs further work as the current implementation depends on the fact
that the compiler will use registers for local variables in take_over_tlb_and_tt().
Rewrite of that function into assembly is to follow. |
|
| 1787 |
6515 d 5 h |
decky |
/ |
move kernel/trunk, uspace/trunk and boot/trunk to trunk/kernel, trunk/uspace and trunk/boot |
|
| 1780 |
6522 d 6 h |
jermar |
/kernel/trunk/ |
Replace old __u?? types with respective C99 variants (e.g. uint32_t, int64_t, uintptr_t etc.). |
|
| 1702 |
6543 d 9 h |
cejka |
/kernel/trunk/ |
Kernel doxygen comments updated. |
|
| 1108 |
6626 d 1 h |
jermar |
/kernel/trunk/ |
Small PTE_* macros and SET_PTL0_ADDRESS macro changes. |
|
| 977 |
6634 d 9 h |
jermar |
/kernel/trunk/ |
Add sys_mremap() syscall. |
|
| 967 |
6634 d 13 h |
palkovsky |
/kernel/trunk/ |
Allowed userspace to include page.h. |
|
| 792 |
6670 d 9 h |
jermar |
/kernel/trunk/ |
Page hash table architectures now use generic hash table to manage
mappings. |
|
| 765 |
6674 d 2 h |
jermar |
/kernel/trunk/ |
Add PAGE_WIDTH to aid divisions by PAGE_SIZE. |
|
| 758 |
6675 d 1 h |
jermar |
/kernel/trunk/arch/ |
sparc64 bugfix.
When disabling IMMU and DMMU the kernel has to perform synchronization operation
(e.g flush %r or membar #Sync instruction). There is no guarantee that the address
contained in %r is in DTLB and therefore the flush instruction can fault. Normally
this would be recognized and fixed by the OpenFirmware Fast Data MMU fault handler.
However, this handler lives in virtually mapped memory and an attempt to execute
there while the MMUs are disabled would result in a nested trap leading to error state.
Replacing flush %r instruction with membar #Sync, wich is sufficient in this case,
fixes this problem. |
|