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Rev Age Author Path Log message Diff
4668 5411 d 17 h trochtova /branches/dd/ dd branch synchronized with trunk (revision 4667)  
4537 5452 d 4 h trochtova /branches/dd/ dd branch synchronized with trunk (revision 4536)  
4420 5477 d 0 h trochtova /branches/dd/ dd branch synchronized with trunk (revision 4419)  
4296 5511 d 21 h trochtova /branches/dd/ dd branch synchronized with trunk (revision 4295)  
4221 5525 d 1 h trochtova /branches/dd/ Added missing file.  
4156 5539 d 23 h trochtova /branches/dd/ changes in trunk (rev 4155) merged into dd branch  
4055 5551 d 1 h trochtova /branches/dd/ changes in trunk (rev 4054) merged into dd branch  
3022 5834 d 3 h decky /branches/dd/ device drivers branch  
2860 5877 d 18 h cejka /trunk/ Context handling unified for sparc64.  
2797 5889 d 18 h jermar /trunk/kernel/ Each architecture should only announce its endianity.
The conversion macros should be defined only once.		  
2794 5890 d 18 h jermar /trunk/kernel/ Add macros for byte swapping of uint16_t's.  
2725 5946 d 23 h decky /trunk/kernel/ remove config.memory_size, get_memory_size() and memory_init.{c|d}
the amount of available memory can be calculated from the sizes of the zones
add FRAMES2SIZE, SIZE2KB and SIZE2MB functions/macros (code readability)		  
2721 5948 d 0 h decky /trunk/kernel/ convert e820list to a generic physmem command  
2610 6028 d 21 h jermar /trunk/ Support for six syscall arguments for sparc64.
There is a minor stability issue which needs to be fixed (kernel panics upon entering kconsole from the
console task).		  
2510 6100 d 18 h jermar /trunk/kernel/ Experimental support for the cgsix framebuffer, which is found on old Ultra 1
worksations, and the SBUS bus and devices. Not tested.		  
2272 6239 d 19 h jermar /trunk/kernel/ Indentation and formatting fixes.  
2231 6249 d 22 h jermar /trunk/kernel/arch/sparc64/ Fix a nasty bug in the TLB miss handlers on sparc64.
After we no longer lock the kernel stack in the DTLB,
there is a real danger of nested DTLB misses. The nested
miss can very easily clobber the DTLB Tag Access register.
Therefore, the original miss may not read this register, but
it has to receive its value as an argument. The argument
value is saved in the trap table when it is guaranteed that
the nested TLB miss will not occur.		  
2216 6251 d 18 h decky /trunk/ make thread ID 64 bit (task ID is 64 bit already)
cleanup thread syscalls		  
2143 6261 d 22 h jermar /trunk/kernel/arch/sparc64/include/ Remove unneeded enum member.  
2141 6262 d 14 h jermar /trunk/ The Ultimate Solution To Illegal Virtual Aliases.
It is better to avoid them completely than to fight them.
Switch the sparc64 port to 16K pages. The TLBs and TSBs
continue to operate with 8K pages only. Page tables and
other generic parts operate with 16K pages.

Because the MMU doesn't support 16K directly, each 16K
page is emulated by a pair of 8K pages. With 16K pages,
illegal aliases cannot be created in 16K D-cache.		  

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