Subversion Repositories HelenOS

Rev

Go to most recent revision | Show changed files | Details | Compare with Previous | Blame | RSS feed

Filtering Options

Rev Age Author Path Log message Diff
2482 6340 d 19 h jermar /trunk/ Goodbye pseudo threads, welcome fibrils.
The renaming might still be incomplete.
 
2479 6345 d 7 h jermar /trunk/ New, better-structured, directory layout for uspace.  
2071 6502 d 0 h jermar /trunk/ (c) versus (C)  
1787 6692 d 2 h decky / move kernel/trunk, uspace/trunk and boot/trunk to trunk/kernel, trunk/uspace and trunk/boot  
1660 6725 d 11 h palkovsky /uspace/trunk/ FPU psthread support for mips.  
1547 6730 d 5 h palkovsky /uspace/trunk/ AS_AREA_CACHEABLE not needed anymore for sharing.
Added icons to console.
 
1129 6801 d 6 h palkovsky /uspace/trunk/ Completed support for TLS in GCC (modifier __thread) for ia32,amd64,ia64 and mips.  
1123 6801 d 19 h palkovsky /uspace/trunk/libc/arch/mips32/ Changed MIPS to compile as PIC code.  
1120 6801 d 23 h palkovsky /uspace/trunk/libc/arch/ Added missing ia32 files.
Renamed __entry to __start in mips, which is standard in gcc standard
linking scripts.
 
1113 6802 d 10 h palkovsky /uspace/trunk/ Added symbolic links 'libarch','libadt','libipc' into libc/include,
so that it can be easily used from anywhere.
Renamed thread_main to __thread_main.
Allowed MIPS to compile with -O0.
Added non-preemptible threads support (not yet secured by futexes).
Added simple way to hold Thread Local Storage. Support for compiler
will be added later.
This update breaks IA64 uspace.

There is some forgotten spinlock_lock() in futexes, amd64 gets locked
in the secod uspace thread probably with preemption disabled.
 
937 6813 d 2 h jermar /uspace/trunk/libc/arch/ Switch uspace to ELF init.  
805 6846 d 18 h palkovsky /uspace/trunk/ Added AMD64 userspace.  
795 6847 d 4 h palkovsky /uspace/trunk/ Modifiaction to make mips userspace work.  
739 6861 d 10 h jermar /uspace/trunk/libc/arch/ Rename mips32el to mips32.  
498 6923 d 7 h decky /uspace/trunk/libc/arch/ uspace MIPS entry points