| Rev |
Age |
Author |
Path |
Log message |
Diff |
| 1999 |
6438 d 6 h |
decky |
/trunk/ |
start RAM disk support |
|
| 1981 |
6448 d 4 h |
jermar |
/trunk/kernel/ |
Indentation, formatting and minor changes. |
|
| 1972 |
6461 d 3 h |
jermar |
/trunk/ |
Modify selected function to consume less stack space.
Avoid flushw instruction in the sparc64 loader. |
|
| 1954 |
6470 d 19 h |
jermar |
/trunk/ |
Minor changes. Some coding style fixes and also a type (tee vs. tree).
One AS -> as change. |
|
| 1950 |
6474 d 23 h |
jermar |
/trunk/kernel/ |
Indentation changes and coding style fixes in slab.c and slab.h. |
|
| 1933 |
6479 d 20 h |
jermar |
/trunk/kernel/generic/ |
Implement efficient IPC notification cleanup. |
|
| 1932 |
6479 d 20 h |
jermar |
/trunk/kernel/ |
Do not copy notification config out of the IRQ structure.
Add the notify member, that toggles notifications on and off instead.
This is good for preventing other tasks from registering the notification
while the notification config is stored outside the IRQ structure.
It should also help to implement the cleanup code. |
|
| 1929 |
6480 d 1 h |
decky |
/trunk/kernel/generic/src/console/ |
ipc_irq_send_msg(NULL, 0, 0, 0) is definitively a bug |
|
| 1926 |
6480 d 7 h |
decky |
/trunk/kernel/ |
cleanup for new IRQ subsystem |
|
| 1924 |
6480 d 20 h |
jermar |
/trunk/kernel/generic/ |
For the sake of clarity, get rid of negative INR for virtual interrupts.
This way, the code can hurt performance on systems where the non-negative klog INR overlaps
with a frequently used INR such as system clock on amd64 and ia32. |
|
| 1923 |
6480 d 20 h |
jermar |
/trunk/ |
Replace the old IRQ dispatcher and IPC notifier with new implementation.
Note that all architectures except for sparc64 are now broken
and don't even compile. |
|
| 1922 |
6482 d 4 h |
jermar |
/trunk/kernel/ |
More IRQ stuff.
Modify the IRQ hash table functions to support lookup based on inr and devno.
Add method member to irq_t. |
|
| 1921 |
6482 d 21 h |
jermar |
/trunk/kernel/ |
Changes in ns16550 and z8530 drivers.
Add some stuff for IRQ notifications to irq_t. |
|
| 1920 |
6483 d 5 h |
jermar |
/trunk/kernel/ |
Move the new IRQ redirector to ddi/.
Add function for assigning unique device numbers.
Change sparc64/drivers/kbd.c to assign devno to keyboard. |
|
| 1919 |
6483 d 20 h |
jermar |
/trunk/kernel/ |
Prototypical implementation of new IRQ redirector in sparc64.
The new code can support shared IRQs in kernel (and multiple IRQs per device).
Userspace support is yet to be written.
The only architecture that uses this code is actually sparc64 only. |
|
| 1915 |
6488 d 21 h |
jermar |
/trunk/kernel/ |
A quote from from SPARC V9 specification:
The Y register is deprecated; it is provided only for compatibility with previous versions
of the architecture. It should not be used in new SPARC-V9 software. It is
recommended that all instructions that reference the Y register (i.e., SMUL,
SMULcc, UMUL, UMULcc, MULScc, SDIV, SDIVcc, UDIV, UDIVcc, RDY, and
WRY) be avoided. See the appropriate pages in Appendix A, “Instruction Definitions,”
for suitable substitute instructions.
Still gcc is generating code which uses Y and some of the instructions above.
This change modifies the preemptible_handler() to preserve the Y register
across preemption. |
|
| 1914 |
6489 d 2 h |
jermar |
/trunk/kernel/generic/ |
Add function for printing out info about address space. |
|
| 1904 |
6499 d 1 h |
jermar |
/trunk/kernel/ |
IPI/cross-call support for sparc64.
SMP on sparc64 is now fully supported. |
|
| 1901 |
6501 d 2 h |
jermar |
/trunk/kernel/ |
Make SMP related parts of main.c more generic.
Move initialization of local APIC to architecture specific code.
Add arch_post_cpu_init() to support the above. |
|
| 1896 |
6504 d 19 h |
jermar |
/trunk/ |
Convert sparc64 to detect keyboard and determine
its physical address by walking the memory representation
of the OpenFirmware device tree.
Add bus-specific functions that know how to apply the
"ranges" property to one component of the "reg" property.
Buses supported so far include FHC, EBUS and PCI. |
|