Rev |
Age |
Author |
Path |
Log message |
Diff |
2231 |
6395 d 2 h |
jermar |
/trunk/kernel/arch/sparc64/ |
Fix a nasty bug in the TLB miss handlers on sparc64.
After we no longer lock the kernel stack in the DTLB,
there is a real danger of nested DTLB misses. The nested
miss can very easily clobber the DTLB Tag Access register.
Therefore, the original miss may not read this register, but
it has to receive its value as an argument. The argument
value is saved in the trap table when it is guaranteed that
the nested TLB miss will not occur. |
|
2228 |
6395 d 4 h |
jermar |
/trunk/kernel/arch/sparc64/src/ |
Fix ticket #28.
In switch_to_userspace(), the uarg argument is in %i2, not in %i3. |
|
2227 |
6395 d 12 h |
decky |
/trunk/kernel/ |
start shutdown infrastructure |
|
2225 |
6395 d 12 h |
decky |
/trunk/kernel/arch/mips32/ |
the bss and common sections have to be in .data output section to be properly generated in the binary image
(this might break IRIX, but it is already unmaintaned) |
|
2222 |
6395 d 21 h |
decky |
/trunk/kernel/ |
map kernel pages explicitly as writable (this solves compatibility issues with Intel Core 2)
make VESA framebuffer initialization more robust |
|
2221 |
6395 d 23 h |
decky |
/trunk/kernel/arch/ia32/src/boot/ |
fix typo in comment |
|
2220 |
6395 d 23 h |
decky |
/trunk/kernel/arch/ia32/src/boot/ |
check for PSE support, add error message on PSE not present
make initial mapping explicitly writeable, turn PAE explicitly off (just in case) |
|
2219 |
6396 d 0 h |
decky |
/trunk/kernel/arch/amd64/src/boot/ |
add error message on no long mode support |
|
2218 |
6396 d 19 h |
decky |
/trunk/kernel/ |
support the possibility to send EOI or Interrupt Acknowledgement
prior to processing the interrupt
(this is essential on some architectures to prevent preemption deadlock) |
|
2217 |
6396 d 20 h |
jermar |
/trunk/kernel/arch/ia32/src/smp/ |
On SMP amd64 and ia32 systems, release the irq->lock
before calling clock() from the interrupt handler.
This is important for maintaining kernel preemption
since no preemption can take place while a spinlock
is held. |
|
2216 |
6396 d 22 h |
decky |
/trunk/ |
make thread ID 64 bit (task ID is 64 bit already)
cleanup thread syscalls |
|
2170 |
6403 d 20 h |
jermar |
/trunk/kernel/ |
Simplify synchronization in as_switch().
The function was oversynchronized, which
was causing deadlocks on the address
space mutex.
Now, address spaces can only be switched
when the asidlock is held. This also protects
stealing of ASIDs. No other synchronization
is necessary. |
|
2161 |
6405 d 23 h |
jermar |
/trunk/kernel/arch/sparc64/src/mm/ |
Fix TSB bug during TSB refill.
When one wants to enable a TSB entry, he or she should set the
entry invalid bit to false, as opposed to setting it to true. |
|
2144 |
6406 d 20 h |
jermar |
/trunk/kernel/arch/sparc64/src/mm/ |
Fix TSB size. |
|
2143 |
6407 d 3 h |
jermar |
/trunk/kernel/arch/sparc64/include/ |
Remove unneeded enum member. |
|
2141 |
6407 d 19 h |
jermar |
/trunk/ |
The Ultimate Solution To Illegal Virtual Aliases.
It is better to avoid them completely than to fight them.
Switch the sparc64 port to 16K pages. The TLBs and TSBs
continue to operate with 8K pages only. Page tables and
other generic parts operate with 16K pages.
Because the MMU doesn't support 16K directly, each 16K
page is emulated by a pair of 8K pages. With 16K pages,
illegal aliases cannot be created in 16K D-cache. |
|
2134 |
6408 d 23 h |
jermar |
/trunk/kernel/ |
Reworked handling of illegal virtual aliases caused by frame reuse.
We moved the incomplete handling from backend's frame method to
backend's page_fault method. The page_fault method is the one that
can create an illegal alias if it writes the userspace frame using
kernel address with a different page color than the page to which is
this frame mapped in userspace. When we detect this, we do D-cache
shootdown on all processors (!!!).
If we add code that accesses userspace memory from kernel address
space, we will have to check for illegal virtual aliases at all such
places.
I tested this on a 4-way simulated E6500 and a real-world Ultra 5,
which has unfortunatelly only one processor.
This solves ticket #26. |
|
2129 |
6443 d 21 h |
jermar |
/trunk/ |
Fix small problem in sparc64 port.
Bump version to 0.2.0.4 (Sunset). |
|
2128 |
6450 d 23 h |
jermar |
/trunk/ |
Add arm32 architecture. The 32 suffix is used to specify that 16-bit Thumb
instructions are not used. The arm32 code is mostly composed of placeholders
that need to be replaced by real implementation. So far, the arm32 tree
only compiles. If run under GXEmul simulator, an infinit loop at the
kernel entry point will be entered. |
|
2125 |
6451 d 22 h |
decky |
/trunk/ |
experimental support for Objective C
(disabled by default) |
|