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(root)/tags/0.1.1/kernel/genarch/include/mm/page_ht.h @ 4050 – Rev 1968

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Rev	Age	Author	Path	Log message	Diff
1968	6473 d 0 h	jermar	/tags/	Canonize pre-0.2.0.3 tags: remove inner branches, tags and trunk directories. The change now should reflect how those releases looked like after checkout.
1963	6473 d 1 h	jermar	/tags/0.1.1/	Tagging release 0.1.1
1108	6692 d 0 h	jermar	/kernel/trunk/	Small PTE_* macros and SET_PTL0_ADDRESS macro changes.
977	6700 d 8 h	jermar	/kernel/trunk/	Add sys_mremap() syscall.
902	6713 d 9 h	jermar	/kernel/trunk/	ia64 work. More capable TLB miss handlers. The ia64 kernel now passes mm/mapping1 test. Fix generic hash table to properly initialize lists. Change page_ht() to properly initialize inserted PTE's. Change format of generic page hash table PTE's.
793	6736 d 7 h	jermar	/kernel/trunk/	Use hash_table_get_instance instead of list_get_instance. Rename page_operations to page_mapping_operations. Rename page_pt_operations to pt_mapping_operations. Rename page_ht_operations to ht_mapping_operations.
792	6736 d 8 h	jermar	/kernel/trunk/	Page hash table architectures now use generic hash table to manage mappings.
756	6741 d 22 h	jermar	/kernel/trunk/	Memory management work. Remove the last (i.e. 'root') argument from page_mapping_insert() and page_mapping_find(). Page table address is now extracted from the first (i.e. 'as') argument. Add a lot of infrastructure to make the above possible. sparc64 is now broken, most likely because of insufficient identity mapping of physical memory.
746	6747 d 8 h	jermar	/kernel/trunk/	Page hash table modifications.
699	6763 d 9 h	jermar	/kernel/trunk/	Memory management work. Proto-interface and dummy implementation of generic page hash table subsytem.
684	6765 d 7 h	jermar	/kernel/trunk/	Memory management work. Move generic 4-level page table interface to genarch and enable architectures to use different virtual memory mechanisms (e.g. page hash tables). Start page hash table support. Switch ia64 and sparc64 to page hash tables. Other architectures keep on using 4-level page table interface.