Rev |
Age |
Author |
Path |
Log message |
Diff |
743 |
6833 d 1 h |
jermar |
/kernel/trunk/arch/ |
sparc64 work.
13 bits wide means the max value is 8191 and not 0x8191. |
|
742 |
6833 d 2 h |
jermar |
/kernel/trunk/arch/ |
sparc64 work.
Memory context (ASID) is, in fact, 13 bits (and not 12 bits) wide. |
|
741 |
6833 d 2 h |
jermar |
/kernel/trunk/ |
Unlock address space prior TLB shootdown in get_asid() to unify
the locking order among mips32, sparc64 and ia64.
Add ASID_STEALING_ENABLED macro to disable the stealing part on ia64
in a clean way. |
|
730 |
6836 d 5 h |
jermar |
/kernel/trunk/ |
Finalize ASID management for sparc64 and mips32 by making use of FIFO queue of ASIDs. |
|
727 |
6838 d 0 h |
jermar |
/kernel/trunk/ |
New ASID management subsystem (initial work, more is required).
Some TLB invalidation changes. |
|
703 |
6844 d 10 h |
jermar |
/kernel/trunk/ |
Memory management work.
- vm.* -> as.* (as like address space is, imho, more fitting)
- Don't do TLB shootdown on vm_install(). Some architectures only need to call tlb_invalidate_asid().
- Don't allocate all frames for as_area in as_area_create(), but let them be allocated on-demand by as_page_fault().
- Add high-level page fault handler as_page_fault().
- Add as_area_load_mapping(). |
|
700 |
6847 d 9 h |
jermar |
/kernel/trunk/arch/sparc64/include/ |
Remove fmath.h |
|
699 |
6847 d 9 h |
jermar |
/kernel/trunk/ |
Memory management work.
Proto-interface and dummy implementation of generic page hash table subsytem. |
|
691 |
6849 d 6 h |
jermar |
/kernel/trunk/arch/ |
Cleanup. |
|
684 |
6849 d 8 h |
jermar |
/kernel/trunk/ |
Memory management work.
Move generic 4-level page table interface to genarch
and enable architectures to use different virtual memory
mechanisms (e.g. page hash tables).
Start page hash table support.
Switch ia64 and sparc64 to page hash tables.
Other architectures keep on using 4-level page table interface. |
|
669 |
6858 d 0 h |
jermar |
/kernel/trunk/ |
sparc64 work.
kconsole support.
Add non-blocking ofw_getchar(). |
|
667 |
6859 d 3 h |
jermar |
/kernel/trunk/arch/sparc64/ |
sparc64 work.
Rename saving_handler() to preemptible_handler()
and fix it to make sparc64 kernel preemptive.
Add two handlers for two fatal exceptions (i.e.
instruction_access_exception and mem_address_not_aligned.
Fix panic_printf() to not allocate its own register window. |
|
666 |
6861 d 1 h |
jermar |
/kernel/trunk/ |
sparc64 work.
Fix clean_window trap handler so that it clears output registers instead of input registers!
Fix interrupt handlers to save global registers. |
|
665 |
6861 d 11 h |
jermar |
/kernel/trunk/arch/sparc64/ |
sparc64 work.
Tick interrupt support. |
|
664 |
6862 d 22 h |
jermar |
/kernel/trunk/ |
sparc64 work.
Interrupt Levels 1 - 15 serviced.
Minor changes in the exc_* functions. |
|
663 |
6863 d 11 h |
jermar |
/kernel/trunk/arch/sparc64/ |
sparc64 work.
Initial interrupt_vector_trap handler and fixes needed to make it do the right thing (i.e. panic()). |
|
658 |
6866 d 12 h |
jermar |
/kernel/trunk/arch/sparc64/include/ |
sparc64 work.
Add functions to read and write TICK and TICK_compare registers.
Add types describing TICK and TICK_compare registers. |
|
657 |
6866 d 23 h |
jermar |
/kernel/trunk/ |
sparc64 work.
Context again. It turns out, according to SCD 2.4, that registers that didn't have to be saved were saved (%o1 - %o5) and
registers that had to be saved were not saved (%i0 - %i5, %l0 - %l7). |
|
651 |
6868 d 22 h |
decky |
/kernel/trunk/ |
remove arch/$ARCH/boot where not needed, change global Makefile accordingly
remove early_mapping() (breaks ppc32 for now)
change early heap initialization (required for init to work) |
|
650 |
6869 d 0 h |
jermar |
/kernel/trunk/ |
sparc64 work.
Implement interrupt_disable(), interrupt_enable(), interrupt_restore() and interrupt_read() functions.
Fix context save/restore to save/restore register %i7. |
|