Rev |
Age |
Author |
Path |
Log message |
Diff |
1256 |
6686 d 6 h |
jermar |
/kernel/trunk/arch/ |
Improve SYS_IOSPACE_ENABLE support.
The general protection fault handler now contains
code to service early I/O Permission bitmap faults. |
|
1212 |
6693 d 2 h |
palkovsky |
/kernel/trunk/ |
Added uspace call to enable/disable interrupts. |
|
1112 |
6723 d 10 h |
palkovsky |
/kernel/trunk/ |
Added basic kernel infrastructure for ThreadLocalStorage(TLS) for
ia32(complete),amd64(complete),mips32(missing emulation of rdhwr instruction). |
|
1072 |
6729 d 9 h |
palkovsky |
/kernel/trunk/ |
Added debugger to AMD64.
Added automatic debugging of AS if it is not rewritten with zero.
Did small changes to IPC infrastructure. |
|
806 |
6767 d 18 h |
palkovsky |
/kernel/trunk/arch/amd64/ |
Added (finally!) userspace to AMD64.
It does not work on Simics *$U&%&$&*#. Broken simics!!!
There should be probably LEA instead of MOV/ADD, but LEA does not
work in neither qemu nor bochs. Any other simulator to test? :-/ |
|
803 |
6767 d 21 h |
palkovsky |
/kernel/trunk/arch/amd64/ |
Basic amd syscall support. |
|
799 |
6767 d 23 h |
palkovsky |
/kernel/trunk/ |
Preliminary work on AMD userspace. |
|
534 |
6832 d 1 h |
jermar |
/ |
Rename HelenOS/SPARTAN to HelenOS/kernel again. |
|
532 |
6832 d 1 h |
jermar |
/ |
Revert renaming of HelenOS/SPARTAN to HelenOS/kernel because of important pending patch. |
|
501 |
6844 d 5 h |
jermar |
/ |
Rename HelenOS/SPARTAN to HelenOS/kernel. |
|
309 |
6921 d 11 h |
palkovsky |
/SPARTAN/trunk/ |
Added architecture independent hooks for fpu lazy context switching.
It is enabled by defining FPU_LAZY |
|
282 |
6923 d 12 h |
palkovsky |
/SPARTAN/trunk/ |
Fixed gdtr naming issues after ia32 changes.
Fixed stack alignment on new thread to by multiple of 16,
we are now ABI-correct and we do not #GP on va_arg to boot.
Fixed bad exception register names reporting.
Fixed bad _hardcoded_load_addr, which caused allocation of kernel text
frames. |
|
251 |
6924 d 20 h |
palkovsky |
/SPARTAN/trunk/ |
Changes, that were needed to make it work on Bochs.
- We CAN use the NX bit in paging tables, but we have
to initialize the NXE bit in EFER register first. |
|
192 |
6928 d 3 h |
jermar |
/SPARTAN/trunk/ |
Dump implementation of THREAD, TASK and CPU.
Implement preemption-safe versions of THREAD, TASK and CPU using THE.
Get rid of CPU_ID_ARCH on all architectures.
Get rid of write_dr0() and read_dr0() on IA-32.
Get rid of cpu_private_data and cpu_private_data_t. |
|
164 |
6941 d 1 h |
palkovsky |
/SPARTAN/trunk/ |
Basics for amd64 architecture. It does compile, but it does not work yet. |
|