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Rev Age Author Path Log message Diff
2335 6278 d 6 h kebrt /branches/arm/uspace/libc/arch/arm32/ some minor changes  
2334 6278 d 6 h kebrt /branches/arm/uspace/libc/arch/arm32/include/ context_set() added  
2333 6278 d 7 h jancik /branches/arm/uspace/libc/arch/arm32/include/ TLS update  
2332 6280 d 4 h kebrt /branches/arm/uspace/libc/arch/arm32/ tls register updated to r9  
2320 6281 d 8 h jancik /branches/arm/uspace/libc/arch/arm32/ TLS  
2313 6281 d 22 h kebrt /branches/arm/ +/- 1 addition switched in atomic_post/pre...  
2305 6286 d 20 h kebrt /branches/arm/uspace/libc/arch/arm32/src/ "b" instruction replaced for "bl"  
2295 6291 d 21 h kebrt /branches/arm/uspace/libc/arch/arm32/ page size changed to 4k  
2288 6295 d 3 h stepan /branches/arm/uspace/libc/arch/arm32/include/ added missing header  
2287 6295 d 19 h jancik /branches/arm/uspace/libc/arch/arm32/ uspace threads, atomic ops  
2281 6298 d 11 h jancik /branches/arm/uspace/libc/arch/arm32/src/ entry points into userspace + syscall user part  
2131 6328 d 2 h decky /branches/ add development branches  
2128 6368 d 0 h jermar /trunk/ Add arm32 architecture. The 32 suffix is used to specify that 16-bit Thumb
instructions are not used. The arm32 code is mostly composed of placeholders
that need to be replaced by real implementation. So far, the arm32 tree
only compiles. If run under GXEmul simulator, an infinit loop at the
kernel entry point will be entered.		  
2089 6383 d 5 h decky /trunk/ huge type system cleanup
remove cyclical type dependencies across multiple header files
many minor coding style fixes		  
2082 6389 d 6 h decky /trunk/ __asm__ __volatile__ -> asm volatile  
2075 6392 d 22 h jermar /trunk/uspace/libc/generic/ Remove left over debugging stuff.  
2072 6393 d 21 h jermar /trunk/uspace/libc/ Add bcmp() to libc.  
2071 6393 d 22 h jermar /trunk/ (c) versus (C)  
2070 6394 d 6 h jermar /trunk/ Rather big indentation and formatting changes.
More inteligent long line wrapping.		  
2061 6412 d 5 h jermar /trunk/ Improve comments and fix formatting in (sparc64) TLS implementation.
Improve some comments and formatting in sparc64 uspace thread library
code.

Update required msim version.		  

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