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Rev Age Author Path Log message Diff
2410 6205 d 23 h stepan /branches/arm/kernel/arch/arm32/ doxygen @file @brief comments added  
2329 6219 d 18 h kebrt /branches/arm/kernel/arch/arm32/ comments added & edited  
2278 6237 d 9 h jancik /branches/arm/kernel/arch/arm32/ Page faults handlers moved into separate file  
2277 6239 d 21 h jancik /branches/arm/kernel/arch/arm32/ Set correct data and prefetch excepion vectors  
2276 6239 d 21 h jancik /branches/arm/kernel/arch/arm32/ Page table defines moved into page.h, spaces convered into tabs  
2263 6243 d 19 h kebrt /branches/arm/kernel/ gxemul HW devices mapped using hw_map(), #define MACHINE_TESTARM_GXEMUL added  
2259 6244 d 2 h jancik /branches/arm/kernel/arch/arm32/include/mm/ settings flags update  
2258 6244 d 3 h jancik /branches/arm/kernel/arch/arm32/ page faults added, beta version  
2256 6244 d 19 h kebrt /branches/arm/kernel/arch/arm32/ few bugs in MM fixed (PAGE_PRESENT used badly) -> 2nd level paging now works; coding style  
2242 6247 d 20 h kebrt /branches/arm/kernel/ ARM has 16kB first level page table, so PTL0..3_SIZE constants added to frame_alloc and all achitectures  
2241 6247 d 22 h kebrt /branches/arm/ comments & code standards & typo  
2238 6248 d 19 h kebrt /branches/arm/kernel/arch/arm32/ refactoring & comments & code standards  
2199 6253 d 19 h jancik /branches/arm/kernel/arch/arm32/ Alf: Memory management update  
2182 6255 d 18 h jancik /branches/arm/kernel/arch/arm32/ Alf: Paging ... not tested  
2149 6262 d 15 h jancik /branches/arm/kernel/arch/arm32/include/  
2147 6262 d 15 h jancik /branches/arm/kernel/arch/arm32/include/ alf: Page table structure  
2131 6267 d 0 h decky /branches/ add development branches  
2128 6306 d 22 h jermar /trunk/ Add arm32 architecture. The 32 suffix is used to specify that 16-bit Thumb
instructions are not used. The arm32 code is mostly composed of placeholders
that need to be replaced by real implementation. So far, the arm32 tree
only compiles. If run under GXEmul simulator, an infinit loop at the
kernel entry point will be entered.