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SPARTAN
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47
7004 d 20 h
jermar
/SPARTAN/trunk/src/main/
Remove redundant comments.
46
7004 d 21 h
vana
/SPARTAN/trunk/
Remove fpu_context pointer from context_t.
Add fpu_context statically to thread_t.
Two functions for saving and restoring FPU context on lazy switch.
45
7005 d 0 h
vana
/SPARTAN/trunk/
Added fpu_context_t type.
IA-32's version of this type contains array of 512 bytes to be used by FXSAVE ... instructions.
44
7005 d 1 h
vana
/SPARTAN/trunk/src/
JV's first commit :-)
43
7005 d 13 h
jermar
/SPARTAN/trunk/src/
Add comfortable build and cleanup scripts for ia32, ia64 and mips architectures.
42
7005 d 13 h
jermar
/SPARTAN/trunk/
Add stdarg.h to support variable argument list functions on architectures with compiler support for __builtin_va_*.
stackarg.h is kept for those architectures which lack that kind of support and for testing purposes.
Make printing functions use the __native type and support the maximum integer width.
41
7006 d 22 h
jermar
/SPARTAN/trunk/include/
Typo corrected.
40
7006 d 22 h
jermar
/SPARTAN/trunk/
Variable argument list support for architectures passing arguments on stack.
39
7008 d 12 h
jermar
/SPARTAN/trunk/arch/ia64/
IA-64 cosmetics.
Fix boot/boot.s to jump to the appropriate address.
Revert _link.ld to contain previously deleted sections.
38
7009 d 16 h
jermar
/SPARTAN/trunk/arch/ia32/
Make read/write_dr0() inlined.
37
7009 d 23 h
jermar
/SPARTAN/trunk/
More IA-64 work.
IA-64 putchar() for Ski simulator.
Linker script changes.
36
7010 d 15 h
jermar
/SPARTAN/trunk/arch/ia64/
More IA-64 work.
35
7011 d 23 h
jermar
/SPARTAN/trunk/
Early support for IA-64 architecture.
34
7012 d 18 h
jermar
/SPARTAN/trunk/
More ACPI work.
Initial MADT table parsing.
SMP renaming and reorganization to reflect there are more ways to bring SMP up.
33
7013 d 10 h
jermar
/SPARTAN/trunk/
ACPI update (RSDT/XSDT configuration).
Cosmetic changes.
32
7015 d 13 h
jermar
/SPARTAN/trunk/
ACPI detection code.
MP detection code rewrite.
Minor changes.
31
7016 d 18 h
jermar
/SPARTAN/trunk/
Replace the deadlock-prone TLB shootdown algorithm with a deadlock-free implementation.
The implementation is a variant of the CMU TLB consistency algorithm.
Very inefficient implementation of a very inefficient (but correct) algorithm.
30
7017 d 1 h
jermar
/SPARTAN/trunk/arch/ia32/
Separate EBDA detection from MP Specification code. EBDA address will be needed during ACPI initialization.
29
7017 d 17 h
jermar
/SPARTAN/trunk/arch/ia32/
Begin ACPI support.
ACPI support will be necessary for initialization of SMP systems with SMT (HyperThreading).
28
7017 d 22 h
jermar
/SPARTAN/trunk/
Small improvements.
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