Rev |
Age |
Author |
Path |
Log message |
Diff |
111 |
7013 d 22 h |
palkovsky |
/SPARTAN/trunk/ |
Code cleanup in scheduler.c thread.c - removed unnecessary spinlock.
atomic_inc, atomic_dec moved to arch/atomic.h instead of arch/smp/atomic.h,
advisable to use even in non-smp mode.
Fixed atomic_inc, atomic_dec in mips architecture. |
|
110 |
7015 d 3 h |
jermar |
/SPARTAN/trunk/ |
SMP recovery patch #1. (SMP still broken)
Move ap_boot() to K_TEXT_START_2 section.
Change ap_boot() to cope with mapping of kernel address space.
Change some addresses in mps.c from kernel to physical.
MIPS.
Move msim dprinter device to 0xB0000000.
This address is from kseg1 (unmapped, uncached) segment. |
|
81 |
7033 d 22 h |
jermar |
/SPARTAN/trunk/ |
Add SP_DELTA macro for each architecture.
On IA-32, this macro represents two doublewords that must be on the stack when switching to a new stack.
On MIPS, there is no need to fix sp when switching to a new stack.
On IA-64, this macro is used to allocate the 16-byte scratch area.
IA-64 work.
Changes in start.S. More changes to come.
Define memcopy().
Janitorial fixes.
Add missing #include <panic.h> to rwlock4/test.c.
Remove wrong use of inline keyword from both declaration and definition of l_apic_id(). |
|
72 |
7039 d 22 h |
decky |
/SPARTAN/trunk/ |
size_t usage
const qualifier
code cleanup |
|
68 |
7039 d 22 h |
decky |
/SPARTAN/trunk/ |
NDEBUG debug symbol, ASSERT debug macro, fancier panic() in debug mode
indentation fixes, ASSERTs |
|
34 |
7051 d 2 h |
jermar |
/SPARTAN/trunk/ |
More ACPI work.
Initial MADT table parsing.
SMP renaming and reorganization to reflect there are more ways to bring SMP up. |
|
33 |
7051 d 18 h |
jermar |
/SPARTAN/trunk/ |
ACPI update (RSDT/XSDT configuration).
Cosmetic changes. |
|
32 |
7053 d 21 h |
jermar |
/SPARTAN/trunk/ |
ACPI detection code.
MP detection code rewrite.
Minor changes. |
|
31 |
7055 d 2 h |
jermar |
/SPARTAN/trunk/ |
Replace the deadlock-prone TLB shootdown algorithm with a deadlock-free implementation.
The implementation is a variant of the CMU TLB consistency algorithm.
Very inefficient implementation of a very inefficient (but correct) algorithm. |
|
30 |
7055 d 8 h |
jermar |
/SPARTAN/trunk/arch/ia32/ |
Separate EBDA detection from MP Specification code. EBDA address will be needed during ACPI initialization. |
|
29 |
7056 d 1 h |
jermar |
/SPARTAN/trunk/arch/ia32/ |
Begin ACPI support.
ACPI support will be necessary for initialization of SMP systems with SMT (HyperThreading). |
|
28 |
7056 d 6 h |
jermar |
/SPARTAN/trunk/ |
Small improvements. |
|
27 |
7056 d 20 h |
jermar |
/SPARTAN/trunk/ |
APIC changes and fixes.
Be more robust during MP configuration.
Do not use APIC ID as CPU_ID_ARCH anymore.
Changing APIC ID's is not a good idea.
Use dr0 register instead. |
|
21 |
7065 d 1 h |
jermar |
/SPARTAN/trunk/arch/ia32/ |
Minor changes and cleanups of recent modifications. |
|
16 |
7071 d 2 h |
jermar |
/SPARTAN/trunk/ |
Switch from mm-based 'the' mechanism to macro-based 'cpu_private_data[CPU_ID_ARCH]' mechanism.
Added l_apic_id() and some other minor APIC changes.
Move gdtr to K_DATA_START section.
Move K_DATA_START section immediately behind K_TEXT_START section so that real-mode addresses work even with growing size of kernel code. |
|
15 |
7072 d 0 h |
jermar |
/SPARTAN/trunk/ |
Introduce macros CPU, THREAD, TASK and use them to replace the->cpu, the->thread, the->task.
Later on, this will make it possible to reference *current* cpu, thread and/or task without the aid from virtual memory. |
|
13 |
7113 d 20 h |
jermar |
/SPARTAN/trunk/arch/ia32/ |
MP Specification says that MP Configuration Table extended entries with unrecongised types should be skipped rather than paniced on. |
|
12 |
7114 d 18 h |
jermar |
/SPARTAN/trunk/arch/ia32/src/smp/ |
Fix the algorithm for counting MP Configuration Table checksums. |
|
11 |
7114 d 19 h |
jermar |
/SPARTAN/trunk/ |
Clean up (ia32 vs. i386).
Header files reorganization. |
|
10 |
7115 d 7 h |
jermar |
/SPARTAN/trunk/ |
Be more careful when sending IPI on UP configured as SMP. |
|