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Rev Age Author Path Log message Diff
792 6816 d 9 h jermar /kernel/trunk/ Page hash table architectures now use generic hash table to manage
mappings.		  
763 6820 d 8 h jermar /kernel/trunk/ Modify frame.h to use shifting instead of multiplication and division.
Define FRAME_WIDTH for all architectures.		  
756 6821 d 23 h jermar /kernel/trunk/ Memory management work.
Remove the last (i.e. 'root') argument from page_mapping_insert() and page_mapping_find().
Page table address is now extracted from the first (i.e. 'as') argument.
Add a lot of infrastructure to make the above possible.
sparc64 is now broken, most likely because of insufficient identity mapping of physical memory.		  
753 6823 d 6 h jermar /kernel/trunk/ Convert ASID management of ia64 to ASID FIFO mechanism.
18-bit RIDs are supported.		  
751 6823 d 9 h jermar /kernel/trunk/arch/ia64/ Fix initialization of pta.base on ia64.  
749 6825 d 6 h jermar /kernel/trunk/arch/ia64/ ia64 virtual address translation subsystem update.  
748 6826 d 7 h jermar /kernel/trunk/arch/ia64/ First HT_HASH_ARCH implementation for ia64.  
747 6827 d 0 h jermar /kernel/trunk/ ia64 work.
Add nice wrappers for thash and ttag instructions.
Add nice wrappers for accessing reion registers and PTA.
Fix set_vhpt_environment().
Allocate and initialize page_ht (a.k.a. VHPT).

Add missing header to sparc64.
Remove excessive header from debug.h.		  
746 6827 d 9 h jermar /kernel/trunk/ Page hash table modifications.  
741 6829 d 3 h jermar /kernel/trunk/ Unlock address space prior TLB shootdown in get_asid() to unify
the locking order among mips32, sparc64 and ia64.

Add ASID_STEALING_ENABLED macro to disable the stealing part on ia64
in a clean way.		  
740 6829 d 8 h jermar /kernel/trunk/ ia64 ASID management code (not tested).  
730 6832 d 5 h jermar /kernel/trunk/ Finalize ASID management for sparc64 and mips32 by making use of FIFO queue of ASIDs.  
727 6834 d 1 h jermar /kernel/trunk/ New ASID management subsystem (initial work, more is required).
Some TLB invalidation changes.		  
715 6838 d 5 h vana /kernel/trunk/arch/ia64/ VHPT setup to be able to use ttag and thash instructions  
710 6838 d 8 h vana /kernel/trunk/arch/ia64/include/mm/ VHPT entry  
703 6840 d 10 h jermar /kernel/trunk/ Memory management work.
- vm.* -> as.* (as like address space is, imho, more fitting)
- Don't do TLB shootdown on vm_install(). Some architectures only need to call tlb_invalidate_asid().
- Don't allocate all frames for as_area in as_area_create(), but let them be allocated on-demand by as_page_fault().
- Add high-level page fault handler as_page_fault().
- Add as_area_load_mapping().		  
699 6843 d 10 h jermar /kernel/trunk/ Memory management work.
Proto-interface and dummy implementation of generic page hash table subsytem.		  
691 6845 d 6 h jermar /kernel/trunk/arch/ Cleanup.  
684 6845 d 8 h jermar /kernel/trunk/ Memory management work.
Move generic 4-level page table interface to genarch
and enable architectures to use different virtual memory
mechanisms (e.g. page hash tables).
Start page hash table support.
Switch ia64 and sparc64 to page hash tables.
Other architectures keep on using 4-level page table interface.		  
569 6876 d 0 h jermar /kernel/trunk/ sparc64 work.
Implement functions for reading IMMU and DMMU TLBs.		  

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