Subversion Repositories HelenOS-historic

Rev

Go to most recent revision | Show changed files | Details | Compare with Previous | Blame | RSS feed

Filtering Options

Rev Age Author Path Log message Diff
768 6722 d 17 h palkovsky /kernel/trunk/ Debugged slab allocator. It currently supports per-CPU cache on 1 cpu.  
767 6722 d 18 h palkovsky /kernel/trunk/ Partially working SLAB CPU cache.  
766 6722 d 19 h palkovsky /kernel/trunk/ Basic SLAB (without CPU-cache) passes test.  
765 6722 d 20 h jermar /kernel/trunk/ Add PAGE_WIDTH to aid divisions by PAGE_SIZE.  
764 6723 d 1 h palkovsky /kernel/trunk/ Tested basic non-cached slab allocation.  
763 6723 d 2 h jermar /kernel/trunk/ Modify frame.h to use shifting instead of multiplication and division.
Define FRAME_WIDTH for all architectures.		  
762 6723 d 3 h palkovsky /kernel/trunk/ Currently not-working SLAB allocator.
- slightly changed interface to frame_alloc, allow zone preference		  
761 6723 d 4 h jermar /kernel/trunk/doc/ Remove document describing more relaxed preemption model than the one used in the current kernel.  
760 6723 d 4 h jermar /kernel/trunk/ mips32 is not supposed to allocate page table.
This is done by the generic code now.
Remove PTL0 pointer as it is not needed.

Remove GET_PTL0_ADDRESS from kernel.

Update sparc64 comments in barrier.h.		  
759 6723 d 15 h palkovsky /kernel/trunk/ Skeleton of SLAB allocator.  
758 6723 d 18 h jermar /kernel/trunk/arch/ sparc64 bugfix.
When disabling IMMU and DMMU the kernel has to perform synchronization operation
(e.g flush %r or membar #Sync instruction). There is no guarantee that the address
contained in %r is in DTLB and therefore the flush instruction can fault. Normally
this would be recognized and fixed by the OpenFirmware Fast Data MMU fault handler.
However, this handler lives in virtually mapped memory and an attempt to execute
there while the MMUs are disabled would result in a nested trap leading to error state.
Replacing flush %r instruction with membar #Sync, wich is sufficient in this case,
fixes this problem.		  
757 6723 d 20 h jermar /kernel/trunk/ Blacklist addresses between 0xa0000 and 0xfffff on ia64 for frame allocator.
This area contains VGA text frame buffer and should be avoided.
falloc2 test now passes on ia64.		  
756 6724 d 17 h jermar /kernel/trunk/ Memory management work.
Remove the last (i.e. 'root') argument from page_mapping_insert() and page_mapping_find().
Page table address is now extracted from the first (i.e. 'as') argument.
Add a lot of infrastructure to make the above possible.
sparc64 is now broken, most likely because of insufficient identity mapping of physical memory.		  
755 6725 d 16 h jermar /kernel/trunk/ Change page_mapping_find/insert interfaces to take as_t * as first argument
and not asid_t as second argument. This change was necessitated by the
removal of mapping array from as_area_t and the fact that an address
space doesn't have an ASID when it is created.		  
754 6725 d 17 h jermar /kernel/trunk/generic/ Remove address space area mapping array.
The information is to be stored directly in page tables.
This is to better support 64-bit systems which can have
fairly large address space areas.		  
753 6726 d 0 h jermar /kernel/trunk/ Convert ASID management of ia64 to ASID FIFO mechanism.
18-bit RIDs are supported.		  
752 6726 d 1 h jermar /kernel/trunk/generic/include/ Replace % operator by explicit overflow test to make this ADT compile on ia64.  
751 6726 d 3 h jermar /kernel/trunk/arch/ia64/ Fix initialization of pta.base on ia64.  
750 6726 d 21 h jermar /kernel/trunk/ ia32 SMP updates.
Update info about supported version of Bochs (bump the counter to 2.2.6).
Add Task Priority Register type and initialize this register to a known state.		  
749 6728 d 0 h jermar /kernel/trunk/arch/ia64/ ia64 virtual address translation subsystem update.  

←Prev12Next→

Show All