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Rev Age Author Path Log message Diff
1954 6428 d 7 h jermar /trunk/ Minor changes. Some coding style fixes and also a type (tee vs. tree).
One AS -> as change.
 
1915 6446 d 9 h jermar /trunk/kernel/ A quote from from SPARC V9 specification:

The Y register is deprecated; it is provided only for compatibility with previous versions
of the architecture. It should not be used in new SPARC-V9 software. It is
recommended that all instructions that reference the Y register (i.e., SMUL,
SMULcc, UMUL, UMULcc, MULScc, SDIV, SDIVcc, UDIV, UDIVcc, RDY, and
WRY) be avoided. See the appropriate pages in Appendix A, “Instruction Definitions,”
for suitable substitute instructions.

Still gcc is generating code which uses Y and some of the instructions above.
This change modifies the preemptible_handler() to preserve the Y register
across preemption.
 
1911 6448 d 6 h jermar /trunk/kernel/ Add support for interrupt mapping in the Sabre PCI controller.
Add support for PCI and EBUS interrupt mapping via the OpenFirmware device tree.
Unfortunatelly, the code is not capable enough to earn single ns16550 interrupt.
I suspect something needs to be enabled in the EBUS registers.
 
1904 6456 d 13 h jermar /trunk/kernel/ IPI/cross-call support for sparc64.
SMP on sparc64 is now fully supported.
 
1891 6466 d 7 h jermar /trunk/kernel/ sparc64 work:
- Experimental support for TSB (Translation Storage Buffer).
 
1888 6470 d 12 h jermar /trunk/ C99 compliant header guards (hopefully) everywhere in the kernel.
Formatting and indentation changes.
Small improvements in sparc64.
 
1887 6470 d 16 h jermar /trunk/kernel/arch/sparc64/ When creating TLB mapping for the sparc64 kernel, enable CV (cacheable virtually) bit.
Also install locked mappings only in context 0.
 
1883 6471 d 15 h jermar /trunk/kernel/arch/sparc64/ More sparc64 FPU trap handlers.  
1882 6471 d 15 h jermar /trunk/kernel/ Support for sparc64 FPU context.  
1880 6474 d 7 h jermar /trunk/ Small improvements here and there.  
1870 6479 d 8 h jermar /trunk/kernel/ Handle more sparc64 traps and improve handling of already handled traps.  
1865 6480 d 10 h jermar /trunk/kernel/ sparc64 kernel fixes  
1864 6481 d 5 h jermar /trunk/ sparc64 update.
- Prototype userspace layer implementation that
at least relates to sparc64 and compiles cleanly.
- Fixes for kernel's preemptible_handler and code
related to running userspace.
- Enable userspace. Several dozen instructions
are now run in userspace! We are pretty near
the userspace milestone for sparc64.
 
1863 6483 d 8 h jermar /trunk/ Allow architectures to decide between inlined and not inlined version of syscall wrapper.
Implement inlined syscall wrapper for sparc64.
 
1862 6483 d 12 h jermar /trunk/kernel/ sparc64 work.
Kernel syscall support.
Modify the preemptive_handler for the use by syscalls.
 
1861 6483 d 15 h jermar /trunk/kernel/arch/sparc64/ Convert sparc64 traps using SIMPLE_HANDLER to using PREEMPTIBLE_HANDLER.  
1860 6484 d 10 h jermar /trunk/kernel/ A lot of untested sparc64 stuff:
- Write ASID to hardware when a thread is about to run in userspace.
- Add userspace() and switch_to_userspace() functions.
- Handle special cases when the userspace spill/fill handler causes MMU trap.
- Resolve some TODOs in the existing sparc64 code.
- sparc64 has now C99 compliant header guards.
- Formatting and indentation fixes.
 
1859 6484 d 17 h jermar /trunk/kernel/arch/sparc64/ sparc64 work.
- Convert interrupt_vector trap handler and some mm related trap handlers to
use preemptibe_handler(), which is essential for traps coming from userspace.
- Add fast_data_access_protection() handler.
 
1856 6485 d 17 h jermar /trunk/kernel/ sparc64 work.
- Modify before_thread_runs_arch() to store addresses of the kernel stack and
userspace window buffer, resp., to registers %g6 and %g7, resp, in the
alternate and interrupt global sets.
- Modify after_thread_ran_arch() to sample %g7 from the alternate globals.
- Implement trap handler for spilling register windows into userspace window buffer.
- Implement assembly language functions to access %g6 and %g7 registers in the alternate sets.
- Initialize the trap table so that there are now also spill_1_normal, spill_2_normal,
spill_0_other and fill_1_normal handlers. These handlers are used in different situations
and for different purposes.
 
1855 6486 d 13 h jermar /trunk/kernel/ sparc64 work.

Fix bug introduced in revision 1852. When fixing CWP,
the input registers of the current window (i.e. output
registers of the window belonging to the interrupted
context) must be preserved. Preserve those registers
in memory. Sure there exist more efficient ways how to
copy the inputs.

Simplify before_thread_runs_arch(), resp. after_thread_ran_arch(),
and make them install, resp. uninstall, DTLB locked mapping for
eventual userspace window buffer.
 

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