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476 6768 d 10 h jermar /SPARTAN/trunk/arch/ia64/ ia64 CPU identification.  
473 6770 d 0 h jermar /SPARTAN/trunk/arch/ia64/src/ ia64 work.
Comment some offending steps of heavyweight interrupt handler regarding RSE switching.
With this change, ia64 will do well on tests rwlock #4 and thread #1.
Cleanup.		  
470 6770 d 22 h jermar /SPARTAN/trunk/ ia64 work.
Big cleanup of IA-64 interrupt processing.
Merge of interrupt.c and interrupt_handler.c.
Rewrite of ivt.S and interrupt.c.
Higher level interrupt handlers are now passed a vector number and a pointer to stack structure.

ia32 work.
ia32 has ordered writes. Until it deploys weaker memory ordering model, write_barrier() can be empty statement.		  
272 6837 d 5 h vana /SPARTAN/trunk/arch/ia64/ Symtab support for ia64  
249 6838 d 4 h vana /SPARTAN/trunk/arch/ia64/src/ Serialization of psr write  
239 6839 d 5 h vana /SPARTAN/trunk/ Missing ";" added  
238 6839 d 5 h vana /SPARTAN/trunk/ Register dump on IA-64 exceptions  
212 6840 d 1 h vana /SPARTAN/trunk/ Basic exception support added for ia64 arch ......