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Rev Age Author Path Log message Diff
870 6665 d 17 h vana /kernel/trunk/arch/ia64/ Removed forgoten debug function and reverted my mistake  
869 6665 d 17 h vana /kernel/trunk/ Uaaaaaaa ;-) Itanium Paging !!!!!! ;-)  
819 6679 d 20 h vana /kernel/trunk/arch/ia64/ TR tlb filling functions  
818 6679 d 23 h vana /kernel/trunk/arch/ia64/ IA-64 TLB filling functions for dynamic tlb filling (TC tlb).  
792 6682 d 2 h jermar /kernel/trunk/ Page hash table architectures now use generic hash table to manage
mappings.		  
763 6686 d 2 h jermar /kernel/trunk/ Modify frame.h to use shifting instead of multiplication and division.
Define FRAME_WIDTH for all architectures.		  
756 6687 d 17 h jermar /kernel/trunk/ Memory management work.
Remove the last (i.e. 'root') argument from page_mapping_insert() and page_mapping_find().
Page table address is now extracted from the first (i.e. 'as') argument.
Add a lot of infrastructure to make the above possible.
sparc64 is now broken, most likely because of insufficient identity mapping of physical memory.		  
753 6689 d 0 h jermar /kernel/trunk/ Convert ASID management of ia64 to ASID FIFO mechanism.
18-bit RIDs are supported.		  
751 6689 d 2 h jermar /kernel/trunk/arch/ia64/ Fix initialization of pta.base on ia64.  
749 6691 d 0 h jermar /kernel/trunk/arch/ia64/ ia64 virtual address translation subsystem update.  
748 6692 d 0 h jermar /kernel/trunk/arch/ia64/ First HT_HASH_ARCH implementation for ia64.  
747 6692 d 18 h jermar /kernel/trunk/ ia64 work.
Add nice wrappers for thash and ttag instructions.
Add nice wrappers for accessing reion registers and PTA.
Fix set_vhpt_environment().
Allocate and initialize page_ht (a.k.a. VHPT).

Add missing header to sparc64.
Remove excessive header from debug.h.		  
746 6693 d 2 h jermar /kernel/trunk/ Page hash table modifications.  
741 6694 d 20 h jermar /kernel/trunk/ Unlock address space prior TLB shootdown in get_asid() to unify
the locking order among mips32, sparc64 and ia64.

Add ASID_STEALING_ENABLED macro to disable the stealing part on ia64
in a clean way.		  
740 6695 d 2 h jermar /kernel/trunk/ ia64 ASID management code (not tested).  
730 6697 d 23 h jermar /kernel/trunk/ Finalize ASID management for sparc64 and mips32 by making use of FIFO queue of ASIDs.  
727 6699 d 18 h jermar /kernel/trunk/ New ASID management subsystem (initial work, more is required).
Some TLB invalidation changes.		  
715 6703 d 23 h vana /kernel/trunk/arch/ia64/ VHPT setup to be able to use ttag and thash instructions  
710 6704 d 1 h vana /kernel/trunk/arch/ia64/include/mm/ VHPT entry  
703 6706 d 4 h jermar /kernel/trunk/ Memory management work.
- vm.* -> as.* (as like address space is, imho, more fitting)
- Don't do TLB shootdown on vm_install(). Some architectures only need to call tlb_invalidate_asid().
- Don't allocate all frames for as_area in as_area_create(), but let them be allocated on-demand by as_page_fault().
- Add high-level page fault handler as_page_fault().
- Add as_area_load_mapping().		  

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