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Rev Age Author Path Log message Diff
746 6710 d 9 h jermar /kernel/trunk/ Page hash table modifications.  
744 6711 d 3 h jermar /kernel/trunk/arch/ia64/ Remove ia64 boot as it is not needed by the simulator.  
742 6712 d 2 h jermar /kernel/trunk/arch/ sparc64 work.
Memory context (ASID) is, in fact, 13 bits (and not 12 bits) wide.
 
741 6712 d 3 h jermar /kernel/trunk/ Unlock address space prior TLB shootdown in get_asid() to unify
the locking order among mips32, sparc64 and ia64.

Add ASID_STEALING_ENABLED macro to disable the stealing part on ia64
in a clean way.
 
740 6712 d 9 h jermar /kernel/trunk/ ia64 ASID management code (not tested).  
736 6714 d 6 h jermar /kernel/trunk/arch/ia64/src/ Fix panic_printf on ia64 to call halt() instead of cpu_halt().  
730 6715 d 6 h jermar /kernel/trunk/ Finalize ASID management for sparc64 and mips32 by making use of FIFO queue of ASIDs.  
728 6717 d 0 h vana /kernel/trunk/arch/ia64/src/mm/ Serialize writes to RR because of assembler RAW warning.  
727 6717 d 1 h jermar /kernel/trunk/ New ASID management subsystem (initial work, more is required).
Some TLB invalidation changes.
 
726 6717 d 1 h jermar /kernel/trunk/arch/ia64/src/mm/ Temporarily disable set_VHPT_environment() to stop ia64 kernel from faulting.  
716 6721 d 5 h vana /kernel/trunk/arch/ia64/src/mm/ ttag and thash envelope functions  
715 6721 d 5 h vana /kernel/trunk/arch/ia64/ VHPT setup to be able to use ttag and thash instructions  
710 6721 d 8 h vana /kernel/trunk/arch/ia64/include/mm/ VHPT entry  
703 6723 d 10 h jermar /kernel/trunk/ Memory management work.
- vm.* -> as.* (as like address space is, imho, more fitting)
- Don't do TLB shootdown on vm_install(). Some architectures only need to call tlb_invalidate_asid().
- Don't allocate all frames for as_area in as_area_create(), but let them be allocated on-demand by as_page_fault().
- Add high-level page fault handler as_page_fault().
- Add as_area_load_mapping().
 
699 6726 d 10 h jermar /kernel/trunk/ Memory management work.
Proto-interface and dummy implementation of generic page hash table subsytem.
 
691 6728 d 7 h jermar /kernel/trunk/arch/ Cleanup.  
684 6728 d 8 h jermar /kernel/trunk/ Memory management work.
Move generic 4-level page table interface to genarch
and enable architectures to use different virtual memory
mechanisms (e.g. page hash tables).
Start page hash table support.
Switch ia64 and sparc64 to page hash tables.
Other architectures keep on using 4-level page table interface.
 
674 6732 d 12 h cejka /kernel/trunk/ Support for printing float numbers in kernel removed.  
659 6745 d 12 h jermar /kernel/trunk/ Make the kernel compile with -Wall.  
655 6747 d 5 h jermar /kernel/trunk/arch/ Compilation fixes.  

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