Rev |
Age |
Author |
Path |
Log message |
Diff |
3993 |
5652 d 0 h |
rimsky |
/branches/sparc/kernel/ |
Implemented preemptible trap handler for userspace (including syscalls - did not forget enabling interrupts for them) and the ralated stuff. Implemented handlers of instruction/data MMU miss/protection. Now some userspace tasks are run; there are, however, still some bugs causing unexpected data MMU misses. |
|
3863 |
5674 d 0 h |
rimsky |
/branches/sparc/ |
Simics machine: modifications needed to run userspace (the next step will be to implement the trap handler for uspace); real machine: small fixes, after them the machine passes some parts of the initialization, but fails to determine CPU frequency (probably due to a different format of Machine Description). |
|
3862 |
5677 d 0 h |
rimsky |
/branches/sparc/kernel/ |
Changed the structure of header files, which have sun4u and sun4v versions. Implemented some sun4v TSB functions. |
|
3835 |
5682 d 0 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Niagara: Implemented (and debugged) installing identity mapping for kernel. Now all the kernel tests pass on Simics. |
|
3770 |
5710 d 1 h |
rimsky |
/branches/sparc/ |
Working on Niagara port - TLB initialization, MMU fault status area initialization, hypercall enhancement, modified tick.c so that the (hyperprivileged) TICK register does not have to be accessed. Now the initialization phase proceeds, but some parts of it are omitted for now (e.g. CPU initialization). |
|
3748 |
5717 d 2 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Be careful to preserve the output registers when processing the fast data access MMU miss. |
|
3743 |
5717 d 10 h |
rimsky |
/branches/sparc/ |
Started to implement support for sun4v. Bootloader adapted to autodetect the architecture (sun4u, sun4v). Some generic sparc64 kernel files split into sun4u and sun4v versions (but the sun4u is still the default in many cases - in order to keep the code compilable). Implemented taking over the MMU. Implemented routines for performing the hypervisor API calls. Implemented a trivial standard output driver. HelenOS banner can now be printed from the kernel on Niagara. |
|
3742 |
5717 d 10 h |
rimsky |
/branches/sparc/ |
The sparc branch synchronized with trunk at revision 3722 (trunk@3722). |
|
3492 |
5790 d 4 h |
rimsky |
/branches/sparc/ |
Changes in trunk merged into the sparc branch. SILO's ramdisk issue solved by the CONFIG_RD_EXTERNAL option. |
|
3489 |
5794 d 4 h |
rimsky |
/branches/sparc/ |
More files made conform the US-III specification. (Changes concern mainly TSB.) |
|
3343 |
5846 d 6 h |
decky |
/branches/sparc/ |
add sparc branch |
|
2610 |
6123 d 6 h |
jermar |
/trunk/ |
Support for six syscall arguments for sparc64.
There is a minor stability issue which needs to be fixed (kernel panics upon entering kconsole from the
console task). |
|
2231 |
6344 d 6 h |
jermar |
/trunk/kernel/arch/sparc64/ |
Fix a nasty bug in the TLB miss handlers on sparc64.
After we no longer lock the kernel stack in the DTLB,
there is a real danger of nested DTLB misses. The nested
miss can very easily clobber the DTLB Tag Access register.
Therefore, the original miss may not read this register, but
it has to receive its value as an argument. The argument
value is saved in the trap table when it is guaranteed that
the nested TLB miss will not occur. |
|
2089 |
6415 d 9 h |
decky |
/trunk/ |
huge type system cleanup
remove cyclical type dependencies across multiple header files
many minor coding style fixes |
|
2071 |
6426 d 2 h |
jermar |
/trunk/ |
(c) versus (C) |
|
2068 |
6433 d 9 h |
jermar |
/trunk/kernel/ |
Formatting and indentation fixes. |
|
1978 |
6487 d 2 h |
jermar |
/trunk/ |
sparc64 code to support physical memory that starts on non-zero addresses.
Still needs to be tested on systems with such setup. |
|
1954 |
6509 d 1 h |
jermar |
/trunk/ |
Minor changes. Some coding style fixes and also a type (tee vs. tree).
One AS -> as change. |
|
1915 |
6527 d 2 h |
jermar |
/trunk/kernel/ |
A quote from from SPARC V9 specification:
The Y register is deprecated; it is provided only for compatibility with previous versions
of the architecture. It should not be used in new SPARC-V9 software. It is
recommended that all instructions that reference the Y register (i.e., SMUL,
SMULcc, UMUL, UMULcc, MULScc, SDIV, SDIVcc, UDIV, UDIVcc, RDY, and
WRY) be avoided. See the appropriate pages in Appendix A, “Instruction Definitions,”
for suitable substitute instructions.
Still gcc is generating code which uses Y and some of the instructions above.
This change modifies the preemptible_handler() to preserve the Y register
across preemption. |
|
1911 |
6529 d 0 h |
jermar |
/trunk/kernel/ |
Add support for interrupt mapping in the Sabre PCI controller.
Add support for PCI and EBUS interrupt mapping via the OpenFirmware device tree.
Unfortunatelly, the code is not capable enough to earn single ns16550 interrupt.
I suspect something needs to be enabled in the EBUS registers. |
|