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Rev Age Author Path Log message Diff
2346 6241 d 17 h kebrt /branches/arm/uspace/libc/arch/arm32/include/ ARM_TP_OFFSET found out and added -> TLS bug fixed  
2335 6243 d 15 h kebrt /branches/arm/uspace/libc/arch/arm32/ some minor changes  
2334 6243 d 15 h kebrt /branches/arm/uspace/libc/arch/arm32/include/ context_set() added  
2333 6243 d 16 h jancik /branches/arm/uspace/libc/arch/arm32/include/ TLS update  
2332 6245 d 13 h kebrt /branches/arm/uspace/libc/arch/arm32/ tls register updated to r9  
2320 6246 d 17 h jancik /branches/arm/uspace/libc/arch/arm32/ TLS  
2313 6247 d 7 h kebrt /branches/arm/ +/- 1 addition switched in atomic_post/pre...  
2288 6260 d 12 h stepan /branches/arm/uspace/libc/arch/arm32/include/ added missing header  
2287 6261 d 4 h jancik /branches/arm/uspace/libc/arch/arm32/ uspace threads, atomic ops  
2131 6293 d 11 h decky /branches/ add development branches  
2128 6333 d 9 h jermar /trunk/ Add arm32 architecture. The 32 suffix is used to specify that 16-bit Thumb
instructions are not used. The arm32 code is mostly composed of placeholders
that need to be replaced by real implementation. So far, the arm32 tree
only compiles. If run under GXEmul simulator, an infinit loop at the
kernel entry point will be entered.