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Rev Age Author Path Log message Diff
2332 6250 d 2 h kebrt /branches/arm/uspace/libc/arch/arm32/ tls register updated to r9  
2320 6251 d 6 h jancik /branches/arm/uspace/libc/arch/arm32/ TLS  
2313 6251 d 20 h kebrt /branches/arm/ +/- 1 addition switched in atomic_post/pre...  
2305 6256 d 19 h kebrt /branches/arm/uspace/libc/arch/arm32/src/ "b" instruction replaced for "bl"  
2295 6261 d 19 h kebrt /branches/arm/uspace/libc/arch/arm32/ page size changed to 4k  
2288 6265 d 1 h stepan /branches/arm/uspace/libc/arch/arm32/include/ added missing header  
2287 6265 d 17 h jancik /branches/arm/uspace/libc/arch/arm32/ uspace threads, atomic ops  
2281 6268 d 9 h jancik /branches/arm/uspace/libc/arch/arm32/src/ entry points into userspace + syscall user part  
2131 6298 d 0 h decky /branches/ add development branches  
2128 6337 d 22 h jermar /trunk/ Add arm32 architecture. The 32 suffix is used to specify that 16-bit Thumb
instructions are not used. The arm32 code is mostly composed of placeholders
that need to be replaced by real implementation. So far, the arm32 tree
only compiles. If run under GXEmul simulator, an infinit loop at the
kernel entry point will be entered.