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Rev Age Author Path Log message Diff
73 6977 d 15 h vana /SPARTAN/trunk/ Finished FPU lazy context switching - first version. I have not tested it and there are many things which must be changed when
it runs first time OK.		  
72 6977 d 17 h decky /SPARTAN/trunk/ size_t usage
const qualifier
code cleanup		  
68 6977 d 17 h decky /SPARTAN/trunk/ NDEBUG debug symbol, ASSERT debug macro, fancier panic() in debug mode
indentation fixes, ASSERTs		  
65 6977 d 18 h decky /SPARTAN/trunk/arch/ia32/ doxygen-style comments  
63 6977 d 20 h decky /SPARTAN/trunk/ const qualifier for print functions  
58 6980 d 12 h vana /SPARTAN/trunk/arch/ia32/ Functions for switching TS flag.  
57 6980 d 13 h vana /SPARTAN/trunk/ Begin support for FPU context switching on platforms which can't do it in lazy way.  
52 6980 d 15 h vana /SPARTAN/trunk/ Move fpu_context switching functions from context.s to fpu_context.c on all platforms.
Add fpu_context.h.

Make before_thread_runs() arch-independent and create arch dependent version before_thread_runs_arch().		  
50 6980 d 22 h jermar /SPARTAN/trunk/ Big indentation update.

Add Jakub Vana to AUTHORS.

Minor fixes.		  
49 6980 d 22 h vana /SPARTAN/trunk/arch/ia32/src/ Change indentation in context.s.  
48 6980 d 23 h vana /SPARTAN/trunk/arch/ia32/src/ Add missing function names.  
46 6980 d 23 h vana /SPARTAN/trunk/ Remove fpu_context pointer from context_t.
Add fpu_context statically to thread_t.
Two functions for saving and restoring FPU context on lazy switch.		  
38 6985 d 18 h jermar /SPARTAN/trunk/arch/ia32/ Make read/write_dr0() inlined.  
34 6988 d 20 h jermar /SPARTAN/trunk/ More ACPI work.
Initial MADT table parsing.

SMP renaming and reorganization to reflect there are more ways to bring SMP up.		  
33 6989 d 12 h jermar /SPARTAN/trunk/ ACPI update (RSDT/XSDT configuration).
Cosmetic changes.		  
32 6991 d 16 h jermar /SPARTAN/trunk/ ACPI detection code.
MP detection code rewrite.
Minor changes.		  
31 6992 d 21 h jermar /SPARTAN/trunk/ Replace the deadlock-prone TLB shootdown algorithm with a deadlock-free implementation.
The implementation is a variant of the CMU TLB consistency algorithm.
Very inefficient implementation of a very inefficient (but correct) algorithm.		  
30 6993 d 3 h jermar /SPARTAN/trunk/arch/ia32/ Separate EBDA detection from MP Specification code. EBDA address will be needed during ACPI initialization.  
29 6993 d 20 h jermar /SPARTAN/trunk/arch/ia32/ Begin ACPI support.
ACPI support will be necessary for initialization of SMP systems with SMT (HyperThreading).		  
28 6994 d 0 h jermar /SPARTAN/trunk/ Small improvements.  

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