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Rev Age Author Path Log message Diff
532 6778 d 15 h jermar / Revert renaming of HelenOS/SPARTAN to HelenOS/kernel because of important pending patch.  
515 6788 d 16 h jermar /kernel/trunk/ SMP cleanup continued.
Add nice type for IO APIC ID register.
Replace some magic numbers with more descriptive macros.		  
514 6789 d 10 h jermar /kernel/trunk/arch/ia32/ More SMP cleanup.
Suddenly, keyboard started to work on SMP under Simics.
Still not functional on Bochs (will consult Bochs people).
Doxygen style comments for apic.c.		  
513 6789 d 17 h jermar /kernel/trunk/arch/ia32/ APIC code cleanup.  
512 6789 d 21 h jermar /kernel/trunk/ SMP work.
Add madt_irq_to_pin().
Make ksmp() use virtual irq_to_pin() function, which makes better sence for ACPI configurations.		  
508 6790 d 13 h jermar /kernel/trunk/ Basic keyboard support for ia32.
For some reason, keyoboard looks dead on SMP.

Make kinit() print "kinit..." strings in longer intervals.		  
507 6790 d 16 h decky /kernel/trunk/arch/ia32/include/boot/ revert bug in multiboot flags  
506 6790 d 16 h decky /kernel/trunk/ preparation for init task loading  
501 6790 d 19 h jermar / Rename HelenOS/SPARTAN to HelenOS/kernel.  
481 6800 d 12 h vana /SPARTAN/trunk/arch/ia32/include/ Revert of =m in ia32 atomic operations. In according to gcc docs +m should be right but as Jakub said it is not working
with amd64 but =m is... and I'm not able to build tools for that platform to test it now :-( . (Maybe bug in gcc ???)		  
477 6801 d 20 h vana /SPARTAN/trunk/ Atomic inc & dec functions synchronized on all ia32,ia64 and mips platforms. Now there are 3 versions which returns no value, new value and old value och changed variable.  
475 6802 d 20 h jermar /SPARTAN/trunk/ Define atomic_t type.  
470 6804 d 9 h jermar /SPARTAN/trunk/ ia64 work.
Big cleanup of IA-64 interrupt processing.
Merge of interrupt.c and interrupt_handler.c.
Rewrite of ivt.S and interrupt.c.
Higher level interrupt handlers are now passed a vector number and a pointer to stack structure.

ia32 work.
ia32 has ordered writes. Until it deploys weaker memory ordering model, write_barrier() can be empty statement.		  
469 6804 d 16 h jermar /SPARTAN/trunk/arch/ia32/include/ Get the memory barriers on ia32 right.  
468 6804 d 17 h decky /SPARTAN/trunk/ fix IA-32 fences (1/2)  
458 6804 d 22 h decky /SPARTAN/trunk/ make configuration variables usage consistent  
457 6804 d 22 h decky /SPARTAN/trunk/ new build system almost finished  
452 6805 d 14 h decky /SPARTAN/trunk/ major build system revision (unfinished)
this patchset most definitively breaks a lot of things, be patient		  
432 6809 d 14 h jermar /SPARTAN/trunk/arch/ IA-64 work.
Add some asm functions for manipulation with PSR, AR and CR registers.		  
423 6816 d 18 h decky /SPARTAN/trunk/ Enable/disable CPU memory barriers at compile time  

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