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493
6795 d 8 h
jermar
/SPARTAN/trunk/
Move genarch/{src|include}/firmware/ofw to genarch/{src|include}/ofw.
492
6795 d 8 h
jermar
/SPARTAN/trunk/
Rename map_page_to_frame() to page_mapping_insert() and find_mapping() to page_mapping_find().
New names should make it more apparent that these two belong together.
486
6802 d 8 h
jermar
/SPARTAN/trunk/
Revert to -O3 for all architectures as the mips32 bug got fixed.
484
6802 d 9 h
palkovsky
/SPARTAN/trunk/arch/mips32/src/
Fixed typo in context save.
483
6802 d 11 h
jermar
/SPARTAN/trunk/
For now, each architecture must use its own -O switch (-O2 doesn't work for ia64, -O3 doesn't work for mips32).
New mips32 atomic_add() function.
Cleanup.
481
6804 d 8 h
vana
/SPARTAN/trunk/arch/ia32/include/
Revert of =m in ia32 atomic operations. In according to gcc docs +m should be right but as Jakub said it is not working
with amd64 but =m is... and I'm not able to build tools for that platform to test it now :-( . (Maybe bug in gcc ???)
478
6805 d 14 h
jermar
/SPARTAN/trunk/
Re-aply mistakenly reverted changes.
477
6805 d 17 h
vana
/SPARTAN/trunk/
Atomic inc & dec functions synchronized on all ia32,ia64 and mips platforms. Now there are 3 versions which returns no value, new value and old value och changed variable.
476
6805 d 18 h
jermar
/SPARTAN/trunk/arch/ia64/
ia64 CPU identification.
475
6806 d 17 h
jermar
/SPARTAN/trunk/
Define atomic_t type.
473
6807 d 8 h
jermar
/SPARTAN/trunk/arch/ia64/src/
ia64 work.
Comment some offending steps of heavyweight interrupt handler regarding RSE switching.
With this change, ia64 will do well on tests rwlock #4 and thread #1.
Cleanup.
472
6807 d 16 h
jermar
/SPARTAN/trunk/
Changes in build system.
For .S targets, always do -D__ASM__.
Remove unnecessary #define __ASM__ from various *.S files.
At the end of build, generate disassembler dump for kernel.raw.
ia64 work.
Better General Exception handler.
470
6808 d 5 h
jermar
/SPARTAN/trunk/
ia64 work.
Big cleanup of IA-64 interrupt processing.
Merge of interrupt.c and interrupt_handler.c.
Rewrite of ivt.S and interrupt.c.
Higher level interrupt handlers are now passed a vector number and a pointer to stack structure.
ia32 work.
ia32 has ordered writes. Until it deploys weaker memory ordering model, write_barrier() can be empty statement.
469
6808 d 13 h
jermar
/SPARTAN/trunk/arch/ia32/include/
Get the memory barriers on ia32 right.
468
6808 d 13 h
decky
/SPARTAN/trunk/
fix IA-32 fences (1/2)
467
6808 d 14 h
jermar
/SPARTAN/trunk/arch/
Add sparc64 context_offset.h.
Fix symbolic links in amd64 to be relative.
465
6808 d 16 h
jermar
/SPARTAN/trunk/arch/sparc64/
Add missing arch sources for sparc64.
461
6808 d 18 h
decky
/SPARTAN/trunk/
link kernel in ARCH's native format first, then use objcopy to create output format
460
6808 d 18 h
decky
/SPARTAN/trunk/
some fancy stuff
458
6808 d 18 h
decky
/SPARTAN/trunk/
make configuration variables usage consistent
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