Rev |
Age |
Author |
Path |
Log message |
Diff |
1978 |
6558 d 2 h |
jermar |
/trunk/ |
sparc64 code to support physical memory that starts on non-zero addresses.
Still needs to be tested on systems with such setup. |
|
1977 |
6558 d 22 h |
jermar |
/trunk/ |
Fix bad indentation in ofw.c
sparc64 work:
o Fix copyright in main.c
o Move code from unused parts of the trap table. |
|
1976 |
6564 d 8 h |
jermar |
/trunk/kernel/arch/sparc64/ |
sparc64 context does not have to include the CLEANWIN register. |
|
1975 |
6568 d 0 h |
jermar |
/trunk/kernel/arch/sparc64/src/ |
Typo. |
|
1960 |
6579 d 2 h |
jermar |
/trunk/kernel/arch/sparc64/src/mm/ |
Fix the following bug:
Ticket #3 data_access_exception after killing task on sparc64 |
|
1954 |
6580 d 1 h |
jermar |
/trunk/ |
Minor changes. Some coding style fixes and also a type (tee vs. tree).
One AS -> as change. |
|
1946 |
6586 d 23 h |
jermar |
/trunk/kernel/arch/sparc64/ |
sparc64 work.
- Improve panic screen on data_access_exception
by dumping contents of DSFSR and DSFAR.
- Change the FHC enable interrupt code to only
set the IMAP_V bit. |
|
1931 |
6589 d 3 h |
jermar |
/trunk/ |
Add support for IPC notifications even for polled ns16550 based keyboard. |
|
1923 |
6590 d 1 h |
jermar |
/trunk/ |
Replace the old IRQ dispatcher and IPC notifier with new implementation.
Note that all architectures except for sparc64 are now broken
and don't even compile. |
|
1922 |
6591 d 9 h |
jermar |
/trunk/kernel/ |
More IRQ stuff.
Modify the IRQ hash table functions to support lookup based on inr and devno.
Add method member to irq_t. |
|
1921 |
6592 d 3 h |
jermar |
/trunk/kernel/ |
Changes in ns16550 and z8530 drivers.
Add some stuff for IRQ notifications to irq_t. |
|
1920 |
6592 d 11 h |
jermar |
/trunk/kernel/ |
Move the new IRQ redirector to ddi/.
Add function for assigning unique device numbers.
Change sparc64/drivers/kbd.c to assign devno to keyboard. |
|
1919 |
6593 d 2 h |
jermar |
/trunk/kernel/ |
Prototypical implementation of new IRQ redirector in sparc64.
The new code can support shared IRQs in kernel (and multiple IRQs per device).
Userspace support is yet to be written.
The only architecture that uses this code is actually sparc64 only. |
|
1918 |
6597 d 2 h |
jermar |
/trunk/kernel/arch/sparc64/src/mm/ |
Omitted comma. |
|
1917 |
6597 d 3 h |
jermar |
/trunk/ |
sparc64 work:
- hw_map() can now support up to 8M requests
- CPU stacks are now locked in DTLB of the respective processor
- kernel in the boot phase no longer relies on the stack provided by OpenFirmware
- instead of of doing FLUSHW during kernel startup, simply set the
window state registers to the wanted state
- NWINDOW -> NWINDOWS
- Add/fix some comments and copyrights. |
|
1916 |
6598 d 1 h |
jermar |
/trunk/kernel/arch/sparc64/src/trap/ |
Small change of code organization.
No functional difference. |
|
1915 |
6598 d 2 h |
jermar |
/trunk/kernel/ |
A quote from from SPARC V9 specification:
The Y register is deprecated; it is provided only for compatibility with previous versions
of the architecture. It should not be used in new SPARC-V9 software. It is
recommended that all instructions that reference the Y register (i.e., SMUL,
SMULcc, UMUL, UMULcc, MULScc, SDIV, SDIVcc, UDIV, UDIVcc, RDY, and
WRY) be avoided. See the appropriate pages in Appendix A, “Instruction Definitions,”
for suitable substitute instructions.
Still gcc is generating code which uses Y and some of the instructions above.
This change modifies the preemptible_handler() to preserve the Y register
across preemption. |
|
1912 |
6599 d 11 h |
jermar |
/trunk/kernel/ |
Separate mapping of EBUS interrupts into two parts: EBUS and PCI. |
|
1911 |
6600 d 0 h |
jermar |
/trunk/kernel/ |
Add support for interrupt mapping in the Sabre PCI controller.
Add support for PCI and EBUS interrupt mapping via the OpenFirmware device tree.
Unfortunatelly, the code is not capable enough to earn single ns16550 interrupt.
I suspect something needs to be enabled in the EBUS registers. |
|
1910 |
6602 d 23 h |
jermar |
/trunk/kernel/ |
Rename INO to INR, for the sake of consistency with manuals. |
|