HelenOS
HelenOS-doc
HelenOS-historic
Català-Valencià – Catalan
中文 – Chinese (Simplified)
中文 – Chinese (Traditional)
Česky – Czech
Dansk – Danish
Nederlands – Dutch
English – English
Suomi – Finnish
Français – French
Deutsch – German
עברית – Hebrew
हिंदी – Hindi
Magyar – Hungarian
Bahasa Indonesia – Indonesian
Italiano – Italian
日本語 – Japanese
한국어 – Korean
Македонски – Macedonian
मराठी – Marathi
Norsk – Norwegian
Polski – Polish
Português – Portuguese
Português – Portuguese (Brazil)
Русский – Russian
Slovenčina – Slovak
Slovenščina – Slovenian
Español – Spanish
Svenska – Swedish
Türkçe – Turkish
Українська – Ukrainian
Oëzbekcha – Uzbek
Subversion Repositories
HelenOS
(root)
/
tags
/
0.1.1
/
kernel
/
arch
/
ia64
/
include
/
mm/
@ 3449
– Rev 1968
Rev
Show changed files
|
Directory listing
|
RSS feed
Filtering Options
From rev
To rev
Max revs
Search history for
Show All
Clear current filter
Rev
Age
Author
Path
Log message
Diff
899
6742 d 13 h
jermar
/kernel/trunk/arch/
ia64 work.
Add dummy TLB fault handlers.
Improve code reuse in arch/mm/tlb.c.
879
6745 d 10 h
vana
/kernel/trunk/arch/ia64/
Itanium kernel page extended to maximum (256M) repaired RR manipulation functions, paging setuping function and added some comments.
870
6748 d 6 h
vana
/kernel/trunk/arch/ia64/
Removed forgoten debug function and reverted my mistake
869
6748 d 6 h
vana
/kernel/trunk/
Uaaaaaaa ;-) Itanium Paging !!!!!! ;-)
819
6762 d 9 h
vana
/kernel/trunk/arch/ia64/
TR tlb filling functions
818
6762 d 12 h
vana
/kernel/trunk/arch/ia64/
IA-64 TLB filling functions for dynamic tlb filling (TC tlb).
792
6764 d 15 h
jermar
/kernel/trunk/
Page hash table architectures now use generic hash table to manage
mappings.
763
6768 d 15 h
jermar
/kernel/trunk/
Modify frame.h to use shifting instead of multiplication and division.
Define FRAME_WIDTH for all architectures.
756
6770 d 6 h
jermar
/kernel/trunk/
Memory management work.
Remove the last (i.e. 'root') argument from page_mapping_insert() and page_mapping_find().
Page table address is now extracted from the first (i.e. 'as') argument.
Add a lot of infrastructure to make the above possible.
sparc64 is now broken, most likely because of insufficient identity mapping of physical memory.
753
6771 d 13 h
jermar
/kernel/trunk/
Convert ASID management of ia64 to ASID FIFO mechanism.
18-bit RIDs are supported.
751
6771 d 15 h
jermar
/kernel/trunk/arch/ia64/
Fix initialization of pta.base on ia64.
749
6773 d 13 h
jermar
/kernel/trunk/arch/ia64/
ia64 virtual address translation subsystem update.
748
6774 d 13 h
jermar
/kernel/trunk/arch/ia64/
First HT_HASH_ARCH implementation for ia64.
747
6775 d 7 h
jermar
/kernel/trunk/
ia64 work.
Add nice wrappers for thash and ttag instructions.
Add nice wrappers for accessing reion registers and PTA.
Fix set_vhpt_environment().
Allocate and initialize page_ht (a.k.a. VHPT).
Add missing header to sparc64.
Remove excessive header from debug.h.
746
6775 d 15 h
jermar
/kernel/trunk/
Page hash table modifications.
741
6777 d 9 h
jermar
/kernel/trunk/
Unlock address space prior TLB shootdown in get_asid() to unify
the locking order among mips32, sparc64 and ia64.
Add ASID_STEALING_ENABLED macro to disable the stealing part on ia64
in a clean way.
740
6777 d 15 h
jermar
/kernel/trunk/
ia64 ASID management code (not tested).
730
6780 d 12 h
jermar
/kernel/trunk/
Finalize ASID management for sparc64 and mips32 by making use of FIFO queue of ASIDs.
727
6782 d 7 h
jermar
/kernel/trunk/
New ASID management subsystem (initial work, more is required).
Some TLB invalidation changes.
715
6786 d 12 h
vana
/kernel/trunk/arch/ia64/
VHPT setup to be able to use ttag and thash instructions
←Prev
1
2
Next→
Show All