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kernel/
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928
6685 d 14 h
vana
/kernel/trunk/
Itanium tlb_invalidate_all
927
6685 d 16 h
decky
/kernel/trunk/contrib/conf/
Simics 3.0 IA32/AMD64 component configuration
925
6685 d 18 h
palkovsky
/kernel/trunk/arch/ia32/src/mm/
Fix e820list on ia32.
924
6685 d 19 h
palkovsky
/kernel/trunk/arch/mips32/
Macro redefinition for mips fpu.
923
6686 d 3 h
vana
/kernel/trunk/arch/ia64/src/
paging_start counting fix on ia64
922
6688 d 5 h
jermar
/kernel/trunk/genarch/src/mm/
Fix generic page hash table to align down page addresses.
This was the ia64 userspace show stopper.
921
6688 d 10 h
jermar
/kernel/trunk/arch/ia64/
ia64 work.
Userspace is now working.
There is an unrelated show stopper, however.
919
6688 d 15 h
jermar
/kernel/trunk/
ia64 work.
Changes to make userspace work (kernel part).
Use ski.conf from contrib directory to run Ski.
There is actually no appropriate syscall handler yet.
916
6690 d 17 h
jermar
/kernel/trunk/arch/ia64/src/
ia64 work.
Support switch from userspace register stack in heavyweight handler.
915
6690 d 17 h
jermar
/kernel/trunk/arch/ia64/
ia64 work.
- Another item had to be allocated on stack to remember new value written to ar.bspstore.
Fix heavyweight interruption handler to calculate RSC.loadrs from the new value of ar.bspstore
instead from the old one.
Uncomment instructions switching ar.bspstore.
- Configure kernel with 512M of memory.
912
6692 d 7 h
jermar
/kernel/trunk/
ia64 work.
ivt.S:
Detect userspace stack in heavyweight handler and switch to kernel stack.
Remember the old stack pointer.
As for register stack, kernel stack is assumed still.
Fix alignment issues that showed when STACK_ITEMS was odd.
Fix ld8 instruction that did subtraction of 8 instead of addition of 8.
scheduler.c:
Change before_thread_runs_arch() to calculate address of top of the stack
for the interrupt handler.
911
6692 d 11 h
jermar
/kernel/trunk/arch/ia64/
ia64 work.
Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.
Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.
Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.)
910
6692 d 14 h
bondari
/kernel/trunk/
ELF framework for all archs. SPARC V9 not tested to compile.
909
6692 d 17 h
bondari
/kernel/trunk/generic/include/
elf32 complete headers
907
6694 d 16 h
palkovsky
/kernel/trunk/generic/src/proc/
Correct sleeping on memory allocation during FPU lazy switch.
906
6695 d 3 h
palkovsky
/kernel/trunk/
Added lazy fpu context allocation.
- threads that don't use fpu, don't get allocated fpu context
- fpu context alignment on AMD64 nicely disappeared
905
6695 d 5 h
jermar
/kernel/trunk/
Upgrade toolchain build scripts to install binutils 2.16.1 and gcc 4.1.0.
The only exception is ia64, where the kernel does not build with gcc 4.1.0.
904
6695 d 8 h
jermar
/kernel/trunk/arch/ia64/src/mm/
ia64 fix in page.c
== (comparison) was used istead of = (assignment).
903
6695 d 10 h
jermar
/kernel/trunk/arch/ia64/
ia64 work.
Add code needed for running multiple address spaces and location of kernel stack
after switch from userspace.
902
6696 d 15 h
jermar
/kernel/trunk/
ia64 work.
More capable TLB miss handlers.
The ia64 kernel now passes mm/mapping1 test.
Fix generic hash table to properly initialize lists.
Change page_ht() to properly initialize inserted PTE's.
Change format of generic page hash table PTE's.
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