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4314 5672 d 3 h jermar /trunk/kernel/arch/sparc64/ Replace all deprecated BA (Bicc) instructions with BA %xcc instructions.  
4277 5679 d 7 h jermar /trunk/kernel/arch/sparc64/ On sparc64, do fast indentity mapping only for physical memory.
For addresses above physical memory, such as I/O devices,
fall through to the C miss handler and map the memory noncacheably.
Replace deprecated Bicc instructions with proper Bcc instructions.
 
3672 5809 d 3 h jermar /trunk/ Merge sparc branch to trunk.  
2078 6493 d 6 h jermar /trunk/kernel/arch/sparc64/src/ When invalidating entire TLBs on sparc64, make sure to also invalidate any (locked) global entries.
This fixes Ticket #21.
Fix a comment in start.S stating that the kernel installs a global entry for itself. All entries installed by the kernel
are local to some memory context.
 
2071 6497 d 3 h jermar /trunk/ (c) versus (C)  
2058 6523 d 12 h jermar /trunk/kernel/arch/sparc64/src/ Improve comments.  
2049 6528 d 11 h jermar /trunk/kernel/arch/sparc64/src/ More formatting and indentation changes.  
2009 6541 d 2 h jermar /trunk/kernel/ Initial support for handling illegal virtual aliases on sparc64.  
2008 6543 d 3 h jermar /trunk/kernel/arch/sparc64/ Add dcache_flush() function that flushes D-Cache on sparc64.  
2001 6547 d 0 h jermar /trunk/kernel/ Indentation and comment fixes.  
1996 6553 d 5 h jermar /trunk/kernel/ Add option to compile the sparc64 kernel without the TTE_CV bit support.
The bit is not used by default now.
Enabling it may theoretically lead to physical memory inconsistencies until code that
mitigates the problem is written.
 
1982 6557 d 10 h jermar /trunk/ Modify the sparc64 startup code to not cause MMU traps before it takes over the TLB and
the trap table. Fix several PA2KA and KA2PA omittions or errors. Fix configuration to pass
the DEFS variable along.
 
1978 6558 d 3 h jermar /trunk/ sparc64 code to support physical memory that starts on non-zero addresses.
Still needs to be tested on systems with such setup.
 
1975 6568 d 1 h jermar /trunk/kernel/arch/sparc64/src/ Typo.  
1954 6580 d 1 h jermar /trunk/ Minor changes. Some coding style fixes and also a type (tee vs. tree).
One AS -> as change.
 
1917 6597 d 4 h jermar /trunk/ sparc64 work:
- hw_map() can now support up to 8M requests
- CPU stacks are now locked in DTLB of the respective processor
- kernel in the boot phase no longer relies on the stack provided by OpenFirmware
- instead of of doing FLUSHW during kernel startup, simply set the
window state registers to the wanted state
- NWINDOW -> NWINDOWS
- Add/fix some comments and copyrights.
 
1906 6607 d 5 h jermar /trunk/ Small improvements in sparc64.  
1905 6607 d 13 h jermar /trunk/kernel/arch/sparc64/src/ Small fixes.
The sparc64 kernel now compiles again even if not compiled with SMP support.
 
1903 6609 d 3 h jermar /trunk/ SMP stuff for sparc64.
Almost complete except for IPIs.
The absence of IPI support deadlocks
the kernel when more CPUs are configured.
 
1900 6610 d 10 h jermar /trunk/kernel/arch/sparc64/src/ Block the secondary processors after they setup kernel mapping in ITLB and DTLB and
switch to kernel trap table.
 
1899 6610 d 10 h jermar /trunk/ sparc64 work:
- Loader now starts all processors.
- Kernel halts all but the bootstrup processor for now.
- Read clock-frequency from the respective processor node in the device tree
 
1887 6622 d 10 h jermar /trunk/kernel/arch/sparc64/ When creating TLB mapping for the sparc64 kernel, enable CV (cacheable virtually) bit.
Also install locked mappings only in context 0.
 
1881 6624 d 10 h jermar /trunk/ sparc64 work:
- find a CPU node and read its clock_frequency attribute
- implement asm_delay_loop()
- set TICK_COMPARE register according to processor frequency
- small improvements at random places

OpenFirmware work:
- two new functions for walking the device tree

Generic boot loader work:
- added basic string functions

Usual pile of indentation and formatting fixes.
 
1880 6626 d 2 h jermar /trunk/ Small improvements here and there.  
1868 6631 d 8 h jermar /trunk/ sparc64 work.
- the syscall wrapper needs to use the "memory"
clobber specifier to prevent over-optimization.
- on sparc64, the user address space spans the whole
64-bit space and therefore the macro
USER_ADDRESS_SPACE_SIZE_ARCH, as it was defined,
overflows to 0
- stop using USER_ADDRESS_SPACE_SIZE_ARCH and define
MAX_HEAP_SIZE instead
- in our situation when kernel and user address spaces
are separate, the G (global) bit cannot be used
(there is no point in it anymore)
- add the DEBUG() macro to stdio.h; DEBUG() uses
SYS_IO and is a good debugging tool for getting
early userspace to work
 
1864 6632 d 23 h jermar /trunk/ sparc64 update.
- Prototype userspace layer implementation that
at least relates to sparc64 and compiles cleanly.
- Fixes for kernel's preemptible_handler and code
related to running userspace.
- Enable userspace. Several dozen instructions
are now run in userspace! We are pretty near
the userspace milestone for sparc64.
 
1860 6636 d 4 h jermar /trunk/kernel/ A lot of untested sparc64 stuff:
- Write ASID to hardware when a thread is about to run in userspace.
- Add userspace() and switch_to_userspace() functions.
- Handle special cases when the userspace spill/fill handler causes MMU trap.
- Resolve some TODOs in the existing sparc64 code.
- sparc64 has now C99 compliant header guards.
- Formatting and indentation fixes.
 
1852 6641 d 4 h jermar /trunk/kernel/ sparc64 work.
Bunch of changes in preparation for sparc64 mm and userspace support.
Fix alignment of hardcoded_* variables in linker script.
 
1823 6666 d 7 h jermar /trunk/kernel/arch/sparc64/ sparc64 work.
Dump take_over_tlb_and_tt() and add its assembly language replacement.
 
1822 6666 d 12 h jermar /trunk/ sparc64 work.
1. Formatting fixes.
2. When writing to DMMU ASI's, simple membar() can be used in place of flush().
3. Substantial changes in the way the TLB is taken over.
4. Remove unneeded functions.

This is the first revision that also runs on a real world Ultra 5 with UltraSPARC IIi
processor.

Note that 3. needs further work as the current implementation depends on the fact
that the compiler will use registers for local variables in take_over_tlb_and_tt().
Rewrite of that function into assembly is to follow.
 
1792 6685 d 1 h jermar /trunk/ Move functionality of tlb_arch_init() to take_over_tlb_and_tt().
Call take_over_tlb_and_tt() very early after the kernel starts
executing.
 
1790 6685 d 6 h jermar /trunk/ Remove OpenFirmware calls from kernel/ entirely.

Switch the sparc64 port to use bootinfo.

Copy memcpy from boot/ to sparc64 kernel/ and
adjust it for memcpy_from/to_uspace.
 
1789 6685 d 8 h jermar /trunk/ Fix ofw_memmap() in boot infrastructure.
The cell size is 32-bit and not equal sizeof(ofw_arg_t).
Define architecture dependant #address-cells and #size-cells for cases
the respective properties are missing in the OpenFirmware device tree.
The algorithm now works both for ppc32 and sparc64.

Add memmap_t, screen_t and keyboard_t to sparc64 bootinfo structure.
Be more verbose during sparc64 boot.

Move ALIGN_UP to generic part of boot/.

Change header guards in several places so that they don't contain double underscore.
 
1787 6687 d 5 h decky / move kernel/trunk, uspace/trunk and boot/trunk to trunk/kernel, trunk/uspace and trunk/boot  
1784 6688 d 2 h jermar /kernel/trunk/ Sync OpenFirmware functionality with boot.
Random cleanup.
 
1777 6694 d 8 h jermar /kernel/trunk/ Make sparc64 kernel assume it is loaded by our loader.  
895 6821 d 3 h jermar /kernel/trunk/ sparc64 work.
Very raw and fragile preliminary standalone keyboard support - polling mode only.
Because of a workaround in Simics, the scan codes are the same as on ia32.
 
867 6826 d 8 h jermar /kernel/trunk/ Move OFW functionality of ppc32 memory_init to genarch so that the code can also be used by sparc64.
sparc64 is now close to broken as it lacks functionality to provide identity mapping for the whole phyisical memory.
 
847 6831 d 5 h jermar /kernel/trunk/arch/sparc64/ Improve comments in start.S.  
846 6831 d 6 h jermar /kernel/trunk/arch/sparc64/ sparc64 work.
Relocate kernel to 4M.