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Rev Age Author Path Log message Diff
1511 6631 d 23 h palkovsky /kernel/trunk/arch/ Remove __address from include file included by uspace  
1507 6632 d 0 h vana /kernel/trunk/ IA64 uspace keyboard kernel part  
1488 6632 d 20 h vana /kernel/trunk/arch/ia64/include/ Lost file  
1295 6659 d 1 h jermar /kernel/trunk/arch/ia64/ Complete implementation of memcpy_from_uspace() and memcpy_to_uspace().
The memcpy() variants are based on the assembler output of the generic
_memcpy().
 
1290 6660 d 0 h vana /kernel/trunk/arch/ VESA detection failure fix.

(Some headers)
 
1288 6660 d 2 h jermar /kernel/trunk/ Complete implementation of copy_from_uspace() and copy_to_uspace()
for amd64 and ia32. Other architectures still compile and run,
but need to implement their own assembly-only memcpy(), memcpy_from_uspace(),
memcpy_to_uspace() and their failover parts. For these architectures
only dummy implementations are provided.
 
1265 6664 d 0 h jermar /kernel/trunk/arch/ Add dummy IRQ_COUNT and irq_ipc_bind_arch() to ia64, ppc32 and sparc64 so that they compile again.  
1210 6674 d 1 h vana /kernel/trunk/ Incomplete VHPT walker support for Itanium  
1185 6681 d 23 h jermar /kernel/trunk/ Add task_create_arch() for all architectures.  
1184 6681 d 23 h jermar /kernel/trunk/ Move arch/thread.h to arch/proc/thread.h on all architectures.
Replace ARCH_THREAD_DATA with new thread_arch_t arch on all architectures.
Similarily, add task_arch_t arch on all architectures.
On amd64 and ia32, grow the TSS segment by 64K + 1B to support IO port
permission bitmap. For the same reason, define per task IO port permission bitmaps
on ia32 and amd64.
 
1171 6683 d 5 h jermar /kernel/trunk/ Initialize ARCH_THREAD_DATA on all architectures.
On ia32 and amd64 this fixes bug caused by uninitialized TLS pointer.
 
1170 6683 d 21 h vana /kernel/trunk/ Stack size definition macro definition fix  
1138 6698 d 21 h jermar /kernel/trunk/ CPU stacks must have two frames on ia64.
Make sure both thread stack frames are mapped in before_thread_runs_arch().
Take STACK_FRAMES into account during kernel memory layout initialization in main_bsp().
 
1137 6699 d 0 h vana /kernel/trunk/arch/ia64/include/ context_set patch in kernel for changed allocation of ia64 RSE and stack  
1124 6702 d 3 h jermar /kernel/trunk/arch/ Small changes.
Make sparc64 and ppc32 compile again.
 
1108 6703 d 15 h jermar /kernel/trunk/ Small PTE_* macros and SET_PTL0_ADDRESS macro changes.  
1107 6703 d 15 h jermar /kernel/trunk/ Small atomic #include and typedef changes.  
1104 6703 d 20 h jermar /kernel/trunk/ Define atomic_t only once in atomic.h
Change the encapsulated counter type to long so that it supports negative values as well.
 
1078 6708 d 20 h jermar /kernel/trunk/ Improved uspace threads.
ia64 needs fixing.
 
1070 6709 d 4 h jermar /kernel/trunk/ More checks for address space area conflicts.  
1053 6709 d 21 h vana /kernel/trunk/ Itanium FPU Lazy context switching... but not so much tested  
1024 6710 d 19 h jermar /kernel/trunk/ Redefine semantics of unary atomic operations.
Add test to verify that an architecture understands the semantics correctly.
 
1023 6710 d 19 h vana /kernel/trunk/ Itanium FPU active context switch  
993 6711 d 17 h jermar /kernel/trunk/arch/ia64/ Fix bug in switch to userspace on ia64: ensure start in bank 1.
Fix bug in tlb_invalidate_all() that cause interrupts to be unconditionally enabled.
Optimize context switching by discarding packed attribute of context structures.
 
979 6711 d 23 h vana /kernel/trunk/arch/ia64/ Itanium FPU context save/restore  
967 6712 d 3 h palkovsky /kernel/trunk/ Allowed userspace to include page.h.  
962 6712 d 16 h jermar /kernel/trunk/arch/ia64/ ia64 work.
Support for __SYSCALL4.
Fix user stack initial address.
 
958 6712 d 18 h jermar /kernel/trunk/ Nicer ia32 interrupt handlers and structures holding interrupted context data.
Unify the name holding interrupted context data on all architectures to be istate.
 
955 6712 d 18 h palkovsky /kernel/trunk/ Added kernel IPC functionality.  
945 6713 d 16 h vana /kernel/trunk/arch/ia64/  
944 6713 d 17 h vana /kernel/trunk/ Itanium tlb_invalidate_pages  
940 6713 d 19 h jermar /kernel/trunk/ Get rid of unneeded macros.
Their functionality has been replaced by the ELF loader.
 
938 6713 d 19 h jermar /kernel/trunk/ Basic support for loading ELF object files.
ia64, amd64, ia32 working.
mips32 requires some attention.
 
935 6713 d 20 h vana /kernel/trunk/ Two frame stack (standard stack + RSE) on Itanium  
928 6714 d 0 h vana /kernel/trunk/ Itanium tlb_invalidate_all  
921 6716 d 20 h jermar /kernel/trunk/arch/ia64/ ia64 work.
Userspace is now working.
There is an unrelated show stopper, however.
 
919 6717 d 1 h jermar /kernel/trunk/ ia64 work.
Changes to make userspace work (kernel part).
Use ski.conf from contrib directory to run Ski.

There is actually no appropriate syscall handler yet.
 
915 6719 d 3 h jermar /kernel/trunk/arch/ia64/ ia64 work.
- Another item had to be allocated on stack to remember new value written to ar.bspstore.
Fix heavyweight interruption handler to calculate RSC.loadrs from the new value of ar.bspstore
instead from the old one.
Uncomment instructions switching ar.bspstore.
- Configure kernel with 512M of memory.
 
912 6720 d 17 h jermar /kernel/trunk/ ia64 work.

ivt.S:
Detect userspace stack in heavyweight handler and switch to kernel stack.
Remember the old stack pointer.
As for register stack, kernel stack is assumed still.
Fix alignment issues that showed when STACK_ITEMS was odd.
Fix ld8 instruction that did subtraction of 8 instead of addition of 8.

scheduler.c:
Change before_thread_runs_arch() to calculate address of top of the stack
for the interrupt handler.
 
911 6720 d 21 h jermar /kernel/trunk/arch/ia64/ ia64 work.

Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.

Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.

Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.)