| Rev |
Age |
Author |
Path |
Log message |
Diff |
| 3817 |
5609 d 10 h |
rimsky |
/branches/sparc/kernel/ |
Progress on Niagara: Commented out portions of mm, which are not required for kernel threads (temporarily). Scheduler is working. Implemented a driver of hypervisor's standard input. Kernel console is usable. |
|
| 3771 |
5629 d 12 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Forgotten files comitted to repository. |
|
| 3770 |
5629 d 12 h |
rimsky |
/branches/sparc/ |
Working on Niagara port - TLB initialization, MMU fault status area initialization, hypercall enhancement, modified tick.c so that the (hyperprivileged) TICK register does not have to be accessed. Now the initialization phase proceeds, but some parts of it are omitted for now (e.g. CPU initialization). |
|
| 3743 |
5636 d 20 h |
rimsky |
/branches/sparc/ |
Started to implement support for sun4v. Bootloader adapted to autodetect the architecture (sun4u, sun4v). Some generic sparc64 kernel files split into sun4u and sun4v versions (but the sun4u is still the default in many cases - in order to keep the code compilable). Implemented taking over the MMU. Implemented routines for performing the hypervisor API calls. Implemented a trivial standard output driver. HelenOS banner can now be printed from the kernel on Niagara. |
|
| 3742 |
5636 d 21 h |
rimsky |
/branches/sparc/ |
The sparc branch synchronized with trunk at revision 3722 (trunk@3722). |
|
| 3618 |
5670 d 11 h |
rimsky |
/branches/sparc/ |
Support for framebuffers, where the first pixel is mapped to a different address than the OBP 'reg' property claims. Cleanup, comments, C-style. |
|
| 3591 |
5675 d 19 h |
rimsky |
/branches/sparc/ |
Making the code compatible also with US-IV (US-IV+) - TLB size based on CPU autodetection, cleanup of code waking up APs. General cleanup. |
|
| 3493 |
5706 d 12 h |
rimsky |
/branches/sparc/ |
More changes making the code US-III-conformant (mainly in mm). |
|
| 3489 |
5713 d 14 h |
rimsky |
/branches/sparc/ |
More files made conform the US-III specification. (Changes concern mainly TSB.) |
|
| 3450 |
5735 d 12 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
Made tlb.h conform US-III specification. |
|
| 3440 |
5736 d 21 h |
rimsky |
/branches/sparc/kernel/arch/sparc64/ |
TLB modifications in order to make functions tlb_print and tlb_invalidate_all work correctly in US-III. |
|
| 3343 |
5765 d 16 h |
decky |
/branches/sparc/ |
add sparc branch |
|
| 3133 |
5832 d 13 h |
jermar |
/trunk/kernel/arch/ |
Add smc_coherence() macro to all architectures.
So far, only amd64, ia32, ia64 and sparc64 are implemented. |
|
| 3104 |
5840 d 2 h |
svoboda |
/trunk/kernel/ |
Declare arguments for memstr.h operations as pointers instead of uintptr_t. |
|
| 2745 |
5939 d 21 h |
decky |
/trunk/ |
code cleanup (mostly signed/unsigned)
allow extra compiler warnings |
|
| 2725 |
5960 d 19 h |
decky |
/trunk/kernel/ |
remove config.memory_size, get_memory_size() and memory_init.{c|d}
the amount of available memory can be calculated from the sizes of the zones
add FRAMES2SIZE, SIZE2KB and SIZE2MB functions/macros (code readability) |
|
| 2462 |
6205 d 13 h |
jermar |
/trunk/kernel/ |
Replace gcc-specific __FUNCTION__ with C99 __func__.
suncc's xregs=no%float can be used only on sparc64. |
|
| 2272 |
6253 d 15 h |
jermar |
/trunk/kernel/ |
Indentation and formatting fixes. |
|
| 2267 |
6255 d 14 h |
jermar |
/trunk/kernel/arch/sparc64/src/mm/ |
Fix indentation. |
|
| 2266 |
6255 d 14 h |
jermar |
/trunk/kernel/arch/sparc64/src/mm/ |
Add few assertions to tsb.c and clean it up a little bit. |
|
| 2252 |
6257 d 12 h |
jermar |
/trunk/kernel/arch/sparc64/src/mm/ |
Move one MEMBAR instruction from a delay slot,
which is, due to SF Erratum #51, a potentionally
dangerous place for a MEMBAR to be. |
|
| 2231 |
6263 d 17 h |
jermar |
/trunk/kernel/arch/sparc64/ |
Fix a nasty bug in the TLB miss handlers on sparc64.
After we no longer lock the kernel stack in the DTLB,
there is a real danger of nested DTLB misses. The nested
miss can very easily clobber the DTLB Tag Access register.
Therefore, the original miss may not read this register, but
it has to receive its value as an argument. The argument
value is saved in the trap table when it is guaranteed that
the nested TLB miss will not occur. |
|
| 2170 |
6272 d 11 h |
jermar |
/trunk/kernel/ |
Simplify synchronization in as_switch().
The function was oversynchronized, which
was causing deadlocks on the address
space mutex.
Now, address spaces can only be switched
when the asidlock is held. This also protects
stealing of ASIDs. No other synchronization
is necessary. |
|
| 2161 |
6274 d 14 h |
jermar |
/trunk/kernel/arch/sparc64/src/mm/ |
Fix TSB bug during TSB refill.
When one wants to enable a TSB entry, he or she should set the
entry invalid bit to false, as opposed to setting it to true. |
|
| 2144 |
6275 d 11 h |
jermar |
/trunk/kernel/arch/sparc64/src/mm/ |
Fix TSB size. |
|
| 2141 |
6276 d 10 h |
jermar |
/trunk/ |
The Ultimate Solution To Illegal Virtual Aliases.
It is better to avoid them completely than to fight them.
Switch the sparc64 port to 16K pages. The TLBs and TSBs
continue to operate with 8K pages only. Page tables and
other generic parts operate with 16K pages.
Because the MMU doesn't support 16K directly, each 16K
page is emulated by a pair of 8K pages. With 16K pages,
illegal aliases cannot be created in 16K D-cache. |
|
| 2134 |
6277 d 14 h |
jermar |
/trunk/kernel/ |
Reworked handling of illegal virtual aliases caused by frame reuse.
We moved the incomplete handling from backend's frame method to
backend's page_fault method. The page_fault method is the one that
can create an illegal alias if it writes the userspace frame using
kernel address with a different page color than the page to which is
this frame mapped in userspace. When we detect this, we do D-cache
shootdown on all processors (!!!).
If we add code that accesses userspace memory from kernel address
space, we will have to check for illegal virtual aliases at all such
places.
I tested this on a 4-way simulated E6500 and a real-world Ultra 5,
which has unfortunatelly only one processor.
This solves ticket #26. |
|
| 2089 |
6334 d 20 h |
decky |
/trunk/ |
huge type system cleanup
remove cyclical type dependencies across multiple header files
many minor coding style fixes |
|
| 2078 |
6341 d 17 h |
jermar |
/trunk/kernel/arch/sparc64/src/ |
When invalidating entire TLBs on sparc64, make sure to also invalidate any (locked) global entries.
This fixes Ticket #21.
Fix a comment in start.S stating that the kernel installs a global entry for itself. All entries installed by the kernel
are local to some memory context. |
|
| 2076 |
6343 d 21 h |
jermar |
/trunk/kernel/ |
Beat the implicit illegal virtual alias created by reusing userspace frames.
In the anonymous and ELF backends, if the architecture has virtually indexed D-cache,
selectively flush cachelines belonging to the frame being freed.
This fixes Ticket #20. |
|
| 2071 |
6345 d 13 h |
jermar |
/trunk/ |
(c) versus (C) |
|
| 2048 |
6377 d 14 h |
jermar |
/trunk/ |
Formatting and indentation changes. |
|
| 2016 |
6382 d 20 h |
jermar |
/trunk/kernel/arch/sparc64/src/mm/ |
The D-cache line size is actually 32 bytes on UltraSPARC II, IIi (and also IIe). |
|
| 2015 |
6384 d 13 h |
jermar |
/trunk/ |
Rework support for virtually indexed cache.
Instead of repeatedly flushing the data cache, which was a huge overkill, refuse to create an illegal address alias
in the kernel (again) and allocate appropriate page color in userspace instead. Extend the detection also to
SYS_PHYSMEM_MAP syscall.
Add support for tracking physical memory areas mappable by SYS_PHYSMEM_MAP.
Lots of coding style changes. |
|
| 2010 |
6389 d 12 h |
jermar |
/trunk/kernel/arch/sparc64/src/mm/ |
Fix comment. |
|
| 2009 |
6389 d 12 h |
jermar |
/trunk/kernel/ |
Initial support for handling illegal virtual aliases on sparc64. |
|
| 2008 |
6391 d 13 h |
jermar |
/trunk/kernel/arch/sparc64/ |
Add dcache_flush() function that flushes D-Cache on sparc64. |
|
| 2001 |
6395 d 10 h |
jermar |
/trunk/kernel/ |
Indentation and comment fixes. |
|
| 1996 |
6401 d 15 h |
jermar |
/trunk/kernel/ |
Add option to compile the sparc64 kernel without the TTE_CV bit support.
The bit is not used by default now.
Enabling it may theoretically lead to physical memory inconsistencies until code that
mitigates the problem is written. |
|
| 1988 |
6403 d 11 h |
jermar |
/trunk/kernel/arch/sparc64/src/mm/ |
Update comment and move initialization code away from application processor codepath. |
|