HelenOS-historic
HelenOS
HelenOS-doc
Català-Valencià – Catalan
中文 – Chinese (Simplified)
中文 – Chinese (Traditional)
Česky – Czech
Dansk – Danish
Nederlands – Dutch
English – English
Suomi – Finnish
Français – French
Deutsch – German
עברית – Hebrew
हिंदी – Hindi
Magyar – Hungarian
Bahasa Indonesia – Indonesian
Italiano – Italian
日本語 – Japanese
한국어 – Korean
Македонски – Macedonian
मराठी – Marathi
Norsk – Norwegian
Polski – Polish
Português – Portuguese
Português – Portuguese (Brazil)
Русский – Russian
Slovenčina – Slovak
Slovenščina – Slovenian
Español – Spanish
Svenska – Swedish
Türkçe – Turkish
Українська – Ukrainian
Oëzbekcha – Uzbek
Subversion Repositories
HelenOS-historic
(root)
/
kernel
/
trunk
/
arch
/
ia64
/
include/
– Rev 1104
Rev
Go to most recent revision
|
Show changed files
|
Directory listing
|
RSS feed
Filtering Options
From rev
To rev
Max revs
Search history for
Show All
Clear current filter
Rev
Age
Author
Path
Log message
Diff
1104
6656 d 6 h
jermar
/kernel/trunk/
Define atomic_t only once in atomic.h
Change the encapsulated counter type to long so that it supports negative values as well.
1078
6661 d 5 h
jermar
/kernel/trunk/
Improved uspace threads.
ia64 needs fixing.
1070
6661 d 13 h
jermar
/kernel/trunk/
More checks for address space area conflicts.
1053
6662 d 6 h
vana
/kernel/trunk/
Itanium FPU Lazy context switching... but not so much tested
1024
6663 d 4 h
jermar
/kernel/trunk/
Redefine semantics of unary atomic operations.
Add test to verify that an architecture understands the semantics correctly.
1023
6663 d 5 h
vana
/kernel/trunk/
Itanium FPU active context switch
993
6664 d 3 h
jermar
/kernel/trunk/arch/ia64/
Fix bug in switch to userspace on ia64: ensure start in bank 1.
Fix bug in tlb_invalidate_all() that cause interrupts to be unconditionally enabled.
Optimize context switching by discarding packed attribute of context structures.
979
6664 d 9 h
vana
/kernel/trunk/arch/ia64/
Itanium FPU context save/restore
967
6664 d 12 h
palkovsky
/kernel/trunk/
Allowed userspace to include page.h.
962
6665 d 2 h
jermar
/kernel/trunk/arch/ia64/
ia64 work.
Support for __SYSCALL4.
Fix user stack initial address.
958
6665 d 3 h
jermar
/kernel/trunk/
Nicer ia32 interrupt handlers and structures holding interrupted context data.
Unify the name holding interrupted context data on all architectures to be istate.
955
6665 d 3 h
palkovsky
/kernel/trunk/
Added kernel IPC functionality.
945
6666 d 2 h
vana
/kernel/trunk/arch/ia64/
944
6666 d 2 h
vana
/kernel/trunk/
Itanium tlb_invalidate_pages
940
6666 d 4 h
jermar
/kernel/trunk/
Get rid of unneeded macros.
Their functionality has been replaced by the ELF loader.
938
6666 d 5 h
jermar
/kernel/trunk/
Basic support for loading ELF object files.
ia64, amd64, ia32 working.
mips32 requires some attention.
935
6666 d 6 h
vana
/kernel/trunk/
Two frame stack (standard stack + RSE) on Itanium
928
6666 d 10 h
vana
/kernel/trunk/
Itanium tlb_invalidate_all
921
6669 d 5 h
jermar
/kernel/trunk/arch/ia64/
ia64 work.
Userspace is now working.
There is an unrelated show stopper, however.
919
6669 d 10 h
jermar
/kernel/trunk/
ia64 work.
Changes to make userspace work (kernel part).
Use ski.conf from contrib directory to run Ski.
There is actually no appropriate syscall handler yet.
915
6671 d 13 h
jermar
/kernel/trunk/arch/ia64/
ia64 work.
- Another item had to be allocated on stack to remember new value written to ar.bspstore.
Fix heavyweight interruption handler to calculate RSC.loadrs from the new value of ar.bspstore
instead from the old one.
Uncomment instructions switching ar.bspstore.
- Configure kernel with 512M of memory.
912
6673 d 3 h
jermar
/kernel/trunk/
ia64 work.
ivt.S:
Detect userspace stack in heavyweight handler and switch to kernel stack.
Remember the old stack pointer.
As for register stack, kernel stack is assumed still.
Fix alignment issues that showed when STACK_ITEMS was odd.
Fix ld8 instruction that did subtraction of 8 instead of addition of 8.
scheduler.c:
Change before_thread_runs_arch() to calculate address of top of the stack
for the interrupt handler.
911
6673 d 7 h
jermar
/kernel/trunk/arch/ia64/
ia64 work.
Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.
Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.
Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.)
910
6673 d 10 h
bondari
/kernel/trunk/
ELF framework for all archs. SPARC V9 not tested to compile.
903
6676 d 5 h
jermar
/kernel/trunk/arch/ia64/
ia64 work.
Add code needed for running multiple address spaces and location of kernel stack
after switch from userspace.
902
6677 d 10 h
jermar
/kernel/trunk/
ia64 work.
More capable TLB miss handlers.
The ia64 kernel now passes mm/mapping1 test.
Fix generic hash table to properly initialize lists.
Change page_ht() to properly initialize inserted PTE's.
Change format of generic page hash table PTE's.
901
6677 d 12 h
jermar
/kernel/trunk/arch/
ia64 work.
Provide PA2KA(identity) mapping for kernel data references via Alternate Data TLB Fault handler.
Add before_thread_runs_arch() that maps kstack, if necessary.
Add easy to use dtlb_mapping_insert() for comfortable insertion of kernel data mappings.
900
6678 d 5 h
jermar
/kernel/trunk/arch/ia64/
ia64 work.
Proper TLB fault handlers' headers and prototypes.
PFN 0 needs no longer be marked unavailable to frame allocator.
899
6678 d 6 h
jermar
/kernel/trunk/arch/
ia64 work.
Add dummy TLB fault handlers.
Improve code reuse in arch/mm/tlb.c.
879
6681 d 4 h
vana
/kernel/trunk/arch/ia64/
Itanium kernel page extended to maximum (256M) repaired RR manipulation functions, paging setuping function and added some comments.
871
6683 d 23 h
vana
/kernel/trunk/arch/ia64/include/
C version of Itanium FADDR()
870
6683 d 23 h
vana
/kernel/trunk/arch/ia64/
Removed forgoten debug function and reverted my mistake
869
6683 d 23 h
vana
/kernel/trunk/
Uaaaaaaa ;-) Itanium Paging !!!!!! ;-)
819
6698 d 2 h
vana
/kernel/trunk/arch/ia64/
TR tlb filling functions
818
6698 d 6 h
vana
/kernel/trunk/arch/ia64/
IA-64 TLB filling functions for dynamic tlb filling (TC tlb).
815
6698 d 10 h
jermar
/kernel/trunk/
Fix sparc64 and ia64 to work with the changed frame allocator.
Fix ppc32 to at least compile.
792
6700 d 9 h
jermar
/kernel/trunk/
Page hash table architectures now use generic hash table to manage
mappings.
763
6704 d 8 h
jermar
/kernel/trunk/
Modify frame.h to use shifting instead of multiplication and division.
Define FRAME_WIDTH for all architectures.
756
6705 d 23 h
jermar
/kernel/trunk/
Memory management work.
Remove the last (i.e. 'root') argument from page_mapping_insert() and page_mapping_find().
Page table address is now extracted from the first (i.e. 'as') argument.
Add a lot of infrastructure to make the above possible.
sparc64 is now broken, most likely because of insufficient identity mapping of physical memory.
753
6707 d 6 h
jermar
/kernel/trunk/
Convert ASID management of ia64 to ASID FIFO mechanism.
18-bit RIDs are supported.