| Rev |
Age |
Author |
Path |
Log message |
Diff |
| 4691 |
5448 d 0 h |
svoboda |
/branches/dynload/ |
Merge trunk changes up to r4686. |
|
| 4344 |
5559 d 22 h |
svoboda |
/branches/dynload/ |
Merge trunk changes up to r3988 to dynload. |
|
| 4343 |
5559 d 22 h |
svoboda |
/branches/dynload/ |
Merged trunk changes up to r3925 to dynload. |
|
| 4338 |
5559 d 23 h |
svoboda |
/branches/dynload/ |
Merge trunk changes up to r3787 to dynload. |
|
| 3674 |
5704 d 21 h |
svoboda |
/branches/dynload/ |
Merge latest trunk changes to dynload. |
|
| 3588 |
5727 d 6 h |
svoboda |
/branches/dynload/ |
Merge latest trunk changes into dynload. |
|
| 3403 |
5787 d 8 h |
svoboda |
/branches/dynload/ |
Merge latest trunk changes into dynload |
|
| 2927 |
5909 d 9 h |
decky |
/branches/dynload/ |
added dynload branch |
|
| 2726 |
6005 d 9 h |
vana |
/trunk/ |
Basic IA64 boot and kernel suport for real machines |
|
| 2725 |
6008 d 5 h |
decky |
/trunk/kernel/ |
remove config.memory_size, get_memory_size() and memory_init.{c|d}
the amount of available memory can be calculated from the sizes of the zones
add FRAMES2SIZE, SIZE2KB and SIZE2MB functions/macros (code readability) |
|
| 2721 |
6009 d 5 h |
decky |
/trunk/kernel/ |
convert e820list to a generic physmem command |
|
| 2089 |
6382 d 6 h |
decky |
/trunk/ |
huge type system cleanup
remove cyclical type dependencies across multiple header files
many minor coding style fixes |
|
| 2082 |
6388 d 6 h |
decky |
/trunk/ |
__asm__ __volatile__ -> asm volatile |
|
| 2071 |
6392 d 22 h |
jermar |
/trunk/ |
(c) versus (C) |
|
| 2007 |
6439 d 21 h |
jermar |
/trunk/kernel/ |
Introduce page colors. So far, only sparc64 uses correct page color bits. Other architectures have a dummy define
specifying zero bits for a page color.
There is a new check of page color in as_area_share(). Because of lack of support for this in the userspace, the
check has been #ifef'ed out. |
|
| 1891 |
6513 d 21 h |
jermar |
/trunk/kernel/ |
sparc64 work:
- Experimental support for TSB (Translation Storage Buffer). |
|
| 1890 |
6514 d 7 h |
jermar |
/trunk/ |
- Create a dedicated slab cache for as_t objects and switch from malloc/free to slab_alloc/slab_free for
them.
- Slightly fix and improve both the kernel and userspace atomic_add() on sparc64.
- More TSB work on the sparc64 front. |
|
| 1889 |
6514 d 23 h |
jermar |
/trunk/kernel/ |
Fix bug in mm/as.c:
- as_area_destroy() should not work with AS but as
sparc64 work:
- start implementing TSB support |
|
| 1888 |
6518 d 2 h |
jermar |
/trunk/ |
C99 compliant header guards (hopefully) everywhere in the kernel.
Formatting and indentation changes.
Small improvements in sparc64. |
|
| 1787 |
6583 d 1 h |
decky |
/ |
move kernel/trunk, uspace/trunk and boot/trunk to trunk/kernel, trunk/uspace and trunk/boot |
|
| 1780 |
6590 d 2 h |
jermar |
/kernel/trunk/ |
Replace old __u?? types with respective C99 variants (e.g. uint32_t, int64_t, uintptr_t etc.). |
|
| 1702 |
6611 d 5 h |
cejka |
/kernel/trunk/ |
Kernel doxygen comments updated. |
|
| 1675 |
6615 d 6 h |
jermar |
/kernel/trunk/arch/ia64/ |
On ia64, purge DTR entry before overwriting it with new contents. |
|
| 1511 |
6622 d 4 h |
palkovsky |
/kernel/trunk/arch/ |
Remove __address from include file included by uspace |
|
| 1290 |
6650 d 5 h |
vana |
/kernel/trunk/arch/ |
VESA detection failure fix.
(Some headers) |
|
| 1210 |
6664 d 6 h |
vana |
/kernel/trunk/ |
Incomplete VHPT walker support for Itanium |
|
| 1138 |
6689 d 2 h |
jermar |
/kernel/trunk/ |
CPU stacks must have two frames on ia64.
Make sure both thread stack frames are mapped in before_thread_runs_arch().
Take STACK_FRAMES into account during kernel memory layout initialization in main_bsp(). |
|
| 1108 |
6693 d 21 h |
jermar |
/kernel/trunk/ |
Small PTE_* macros and SET_PTL0_ADDRESS macro changes. |
|
| 1070 |
6699 d 9 h |
jermar |
/kernel/trunk/ |
More checks for address space area conflicts. |
|
| 967 |
6702 d 8 h |
palkovsky |
/kernel/trunk/ |
Allowed userspace to include page.h. |
|
| 958 |
6702 d 23 h |
jermar |
/kernel/trunk/ |
Nicer ia32 interrupt handlers and structures holding interrupted context data.
Unify the name holding interrupted context data on all architectures to be istate. |
|
| 945 |
6703 d 22 h |
vana |
/kernel/trunk/arch/ia64/ |
|
|
| 944 |
6703 d 22 h |
vana |
/kernel/trunk/ |
Itanium tlb_invalidate_pages |
|
| 940 |
6704 d 0 h |
jermar |
/kernel/trunk/ |
Get rid of unneeded macros.
Their functionality has been replaced by the ELF loader. |
|
| 935 |
6704 d 2 h |
vana |
/kernel/trunk/ |
Two frame stack (standard stack + RSE) on Itanium |
|
| 919 |
6707 d 6 h |
jermar |
/kernel/trunk/ |
ia64 work.
Changes to make userspace work (kernel part).
Use ski.conf from contrib directory to run Ski.
There is actually no appropriate syscall handler yet. |
|
| 915 |
6709 d 9 h |
jermar |
/kernel/trunk/arch/ia64/ |
ia64 work.
- Another item had to be allocated on stack to remember new value written to ar.bspstore.
Fix heavyweight interruption handler to calculate RSC.loadrs from the new value of ar.bspstore
instead from the old one.
Uncomment instructions switching ar.bspstore.
- Configure kernel with 512M of memory. |
|
| 911 |
6711 d 3 h |
jermar |
/kernel/trunk/arch/ia64/ |
ia64 work.
Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.
Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.
Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.) |
|
| 903 |
6714 d 1 h |
jermar |
/kernel/trunk/arch/ia64/ |
ia64 work.
Add code needed for running multiple address spaces and location of kernel stack
after switch from userspace. |
|
| 902 |
6715 d 6 h |
jermar |
/kernel/trunk/ |
ia64 work.
More capable TLB miss handlers.
The ia64 kernel now passes mm/mapping1 test.
Fix generic hash table to properly initialize lists.
Change page_ht() to properly initialize inserted PTE's.
Change format of generic page hash table PTE's. |
|