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4348 5558 d 14 h svoboda /branches/dynload/ Merge latest trunk changes to dynload.  
4347 5558 d 14 h svoboda /branches/dynload/ Merge trunk changes up to r4195 to dynload.  
4346 5560 d 1 h svoboda /branches/dynload/ Merge trunk changes up to r4145 to dynload.  
4345 5560 d 1 h svoboda /branches/dynload/ Merge trunk changes up to r4040 to dynload.  
4344 5560 d 2 h svoboda /branches/dynload/ Merge trunk changes up to r3988 to dynload.  
4343 5560 d 2 h svoboda /branches/dynload/ Merged trunk changes up to r3925 to dynload.  
4342 5560 d 2 h svoboda /branches/dynload/ Merge trunk changes up to r3889 to dynload.  
4339 5560 d 3 h svoboda /branches/dynload/ Merge trunk changes up to r3802 to dynload.  
4338 5560 d 3 h svoboda /branches/dynload/ Merge trunk changes up to r3787 to dynload.  
4337 5560 d 3 h svoboda /branches/dynload/ Merge changes in trunk up to r3741 to dynload.  
3674 5705 d 1 h svoboda /branches/dynload/ Merge latest trunk changes to dynload.  
3535 5739 d 6 h svoboda /branches/dynload/ Merge latest trunk changes into dynload.  
3403 5787 d 12 h svoboda /branches/dynload/ Merge latest trunk changes into dynload  
3211 5856 d 12 h svoboda /branches/dynload/ Merge latest trunk changes into dynload  
3168 5875 d 10 h svoboda /branches/dynload/ For each arch define one register for passing a pointer to PCB. Implemented in kernel lowlevel swich-to-userspace funcs and libc entry points. Missing in loader's program_run implementations.  
3153 5877 d 9 h svoboda /branches/dynload/ Merge latest trunk changes into dynload  
3149 5877 d 10 h svoboda /branches/dynload/ Merge trunk changes up to r3071 into dynload (broken)  
3107 5887 d 14 h svoboda /branches/dynload/ Merge trunk changes up to r3044 into dynload  
2927 5909 d 13 h decky /branches/dynload/ added dynload branch  
2784 5966 d 2 h jermar /trunk/kernel/arch/ Fortify ia32 and amd64 kernels against mallicious uspace applications that set
DF prior to entering the kernel. For AMD64 syscalls, we don't use the CLD
instruction, but make use of the SFMASK MSR instead. Simics works fine with
it, but QEMU seems to have a problem.		  
2775 5970 d 13 h cejka /trunk/kernel/arch/ia32/src/ Added missing ia32/context.S from last commit.  
2725 6008 d 8 h decky /trunk/kernel/ remove config.memory_size, get_memory_size() and memory_init.{c|d}
the amount of available memory can be calculated from the sizes of the zones
add FRAMES2SIZE, SIZE2KB and SIZE2MB functions/macros (code readability)		  
2723 6009 d 7 h decky /trunk/kernel/arch/ remove memory_print_map(), as it duplicates functionality of physmem_print()  
2721 6009 d 9 h decky /trunk/kernel/ convert e820list to a generic physmem command  
2712 6013 d 9 h decky /trunk/kernel/ prettyprint output  
2702 6020 d 9 h decky /trunk/kernel/arch/ia32/src/mm/ change cstyle to human-readable form  
2701 6020 d 11 h jermar /trunk/kernel/ Fix cstyle and (c) to 2008.  
2697 6030 d 10 h decky /trunk/kernel/ amd64: shorten kernel address space by 2 GB to support proper mapping of more than 2 GB of physical memory  
2630 6080 d 0 h jermar /trunk/kernel/arch/ Formatting fixes.  
2613 6089 d 3 h jermar /trunk/ Support for six syscall arguments for ia32.  
2612 6089 d 3 h jermar /trunk/kernel/arch/ Cleanup.  
2575 6111 d 3 h jermar /trunk/kernel/arch/ia32/src/ Formatting fixes.  
2482 6231 d 22 h jermar /trunk/ Goodbye pseudo threads, welcome fibrils.
The renaming might still be incomplete.		  
2462 6253 d 2 h jermar /trunk/kernel/ Replace gcc-specific __FUNCTION__ with C99 __func__.
suncc's xregs=no%float can be used only on sparc64.		  
2441 6259 d 1 h decky /trunk/kernel/ fix ICC compilation  
2439 6259 d 1 h decky /trunk/kernel/arch/ia32/src/ fix ICC compilation  
2302 6286 d 5 h decky /trunk/ force VGA palette to 3:2:3 palette on 8 bpp modes
(this fixes ticket #33)		  
2233 6311 d 2 h decky /trunk/kernel/arch/ use the hlt instruction more properly  
2227 6311 d 17 h decky /trunk/kernel/ start shutdown infrastructure  
2222 6312 d 2 h decky /trunk/kernel/ map kernel pages explicitly as writable (this solves compatibility issues with Intel Core 2)
make VESA framebuffer initialization more robust