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– Rev 4710
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4688
5532 d 20 h
trochtova
/branches/dd/
dd branch synchronized with trunk (revision 4687)
4678
5536 d 23 h
trochtova
/branches/dd/
dd branch synchronized with trunk (revision 4677)
4668
5543 d 12 h
trochtova
/branches/dd/
dd branch synchronized with trunk (revision 4667)
4537
5583 d 22 h
trochtova
/branches/dd/
dd branch synchronized with trunk (revision 4536)
4420
5608 d 19 h
trochtova
/branches/dd/
dd branch synchronized with trunk (revision 4419)
4300
5642 d 15 h
trochtova
/branches/dd/
dd branch - fixed a bug in ia32 port (some directories were missing), pci 'driver' converted to lspci
4296
5643 d 15 h
trochtova
/branches/dd/
dd branch synchronized with trunk (revision 4295)
4221
5656 d 20 h
trochtova
/branches/dd/
Added missing file.
4201
5658 d 21 h
trochtova
/branches/dd/
changes in trunk (rev 4200) merged into dd branch
4156
5671 d 17 h
trochtova
/branches/dd/
changes in trunk (rev 4155) merged into dd branch
4055
5682 d 19 h
trochtova
/branches/dd/
changes in trunk (rev 4054) merged into dd branch
3022
5965 d 21 h
decky
/branches/dd/
device drivers branch
2861
6008 d 12 h
cejka
/trunk/
Used common macro for context saving on ppc64.
2860
6009 d 12 h
cejka
/trunk/
Context handling unified for sparc64.
2797
6021 d 12 h
jermar
/trunk/kernel/
Each architecture should only announce its endianity.
The conversion macros should be defined only once.
2794
6022 d 12 h
jermar
/trunk/kernel/
Add macros for byte swapping of uint16_t's.
2784
6036 d 11 h
jermar
/trunk/kernel/arch/
Fortify ia32 and amd64 kernels against mallicious uspace applications that set
DF prior to entering the kernel. For AMD64 syscalls, we don't use the CLD
instruction, but make use of the SFMASK MSR instead. Simics works fine with
it, but QEMU seems to have a problem.
2783
6036 d 12 h
jermar
/trunk/kernel/arch/amd64/src/cpu/
Fix cstyle.
2781
6040 d 19 h
cejka
/trunk/
Unified context saving/restoring macros in ppc32.
2780
6040 d 20 h
cejka
/trunk/
Fixed broken context_offset.h symlinks for mips32eb and ia32xen.
2779
6040 d 20 h
cejka
/trunk/
Context saving/restoring macros used for mips32.
2777
6040 d 22 h
cejka
/trunk/
Unified context handling code for amd64.
2775
6040 d 23 h
cejka
/trunk/kernel/arch/ia32/src/
Added missing ia32/context.S from last commit.
2774
6040 d 23 h
cejka
/trunk/kernel/arch/
Context.s renamed to context.S for ia32 and fixed links for ia32xen.
Added asm macros for context save/restore and offset definitions.
2772
6043 d 12 h
jermar
/trunk/kernel/arch/arm32/src/mm/
Fix breakage in arm32 non-debug build.
2767
6045 d 13 h
jermar
/trunk/kernel/arch/amd64/src/
Fix breakage in non-debug amd64 build.
2745
6057 d 20 h
decky
/trunk/
code cleanup (mostly signed/unsigned)
allow extra compiler warnings
2726
6075 d 22 h
vana
/trunk/
Basic IA64 boot and kernel suport for real machines
2725
6078 d 18 h
decky
/trunk/kernel/
remove config.memory_size, get_memory_size() and memory_init.{c|d}
the amount of available memory can be calculated from the sizes of the zones
add FRAMES2SIZE, SIZE2KB and SIZE2MB functions/macros (code readability)
2723
6079 d 16 h
decky
/trunk/kernel/arch/
remove memory_print_map(), as it duplicates functionality of physmem_print()
2722
6079 d 17 h
decky
/trunk/kernel/arch/mips32/
convert ARC specific commands to generic ones
2721
6079 d 18 h
decky
/trunk/kernel/
convert e820list to a generic physmem command
2720
6079 d 21 h
decky
/trunk/kernel/arch/mips32/src/mm/
prettyprint tlb command
2719
6079 d 22 h
decky
/trunk/kernel/arch/mips32/src/
prettyprint bkpts command
2713
6083 d 18 h
decky
/trunk/kernel/arch/amd64/src/boot/
remove fake tab
2712
6083 d 18 h
decky
/trunk/kernel/
prettyprint output
2703
6090 d 16 h
jermar
/trunk/kernel/arch/amd64/
Grow the initial identity mapping from 64M to 4G.
We should not allocate GDT's from above 4G or the amd64 will occassionally
triple-fault again.
2702
6090 d 18 h
decky
/trunk/kernel/arch/ia32/src/mm/
change cstyle to human-readable form
2701
6090 d 20 h
jermar
/trunk/kernel/
Fix cstyle and (c) to 2008.
2697
6100 d 19 h
decky
/trunk/kernel/
amd64: shorten kernel address space by 2 GB to support proper mapping of more than 2 GB of physical memory