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Rev Age Author Path Log message Diff
949 6667 d 18 h decky /boot/trunk/arch/ppc32/loader/ better MSR bits masking  
948 6667 d 18 h jermar /uspace/trunk/libc/arch/ Unify init linker scripts to contain two properly aligned and properly flagged segments.  
947 6667 d 21 h vana /kernel/trunk/ Better purge page selection.  
946 6668 d 9 h jermar /kernel/trunk/generic/ Fix frame deallocation.
Zone state is to be upadated only when the frame refcount reaches zero.		  
945 6668 d 10 h vana /kernel/trunk/arch/ia64/  
944 6668 d 10 h vana /kernel/trunk/ Itanium tlb_invalidate_pages  
943 6668 d 11 h palkovsky /uspace/trunk/libc/arch/mips32/ Fixed mips alignment support.  
942 6668 d 12 h jermar /uspace/trunk/init/ Generate init.disasm during uspace build.  
941 6668 d 12 h palkovsky /kernel/trunk/ Fixed mips elf loading.  
940 6668 d 12 h jermar /kernel/trunk/ Get rid of unneeded macros.
Their functionality has been replaced by the ELF loader.		  
939 6668 d 12 h palkovsky /kernel/trunk/contrib/conf/ Fix msim configuration.  
938 6668 d 12 h jermar /kernel/trunk/ Basic support for loading ELF object files.
ia64, amd64, ia32 working.
mips32 requires some attention.		  
937 6668 d 13 h jermar /uspace/trunk/libc/arch/ Switch uspace to ELF init.  
936 6668 d 13 h jermar /boot/trunk/arch/ia64/ ia64 now loads init from ELF. Don't need to do objcopy to binary format.  
935 6668 d 13 h vana /kernel/trunk/ Two frame stack (standard stack + RSE) on Itanium  
934 6668 d 14 h decky /kernel/trunk/arch/ppc32/ remove all OpenFirmware bindings from ppc32 kernel code
kernel now runs in real mode (ppc32)		  
933 6668 d 14 h decky /boot/trunk/arch/ppc32/ fix various ppc32 bootloader bugs  
932 6668 d 14 h palkovsky /kernel/trunk/generic/src/console/ Allow using direct address as parameter.  
931 6668 d 14 h palkovsky /kernel/trunk/generic/src/console/ Allow direct address specification.  
930 6668 d 17 h decky /kernel/trunk/contrib/conf/ preliminary Simics 3.0 configuration for Simics  
929 6668 d 17 h palkovsky /kernel/trunk/ Restrict itanium test to itanium.  
928 6668 d 18 h vana /kernel/trunk/ Itanium tlb_invalidate_all  
927 6668 d 19 h decky /kernel/trunk/contrib/conf/ Simics 3.0 IA32/AMD64 component configuration  
926 6668 d 21 h palkovsky /boot/trunk/ Same order of architectures as in kernel.  
925 6668 d 21 h palkovsky /kernel/trunk/arch/ia32/src/mm/ Fix e820list on ia32.  
924 6668 d 22 h palkovsky /kernel/trunk/arch/mips32/ Macro redefinition for mips fpu.  
923 6669 d 6 h vana /kernel/trunk/arch/ia64/src/ paging_start counting fix on ia64  
922 6671 d 9 h jermar /kernel/trunk/genarch/src/mm/ Fix generic page hash table to align down page addresses.
This was the ia64 userspace show stopper.		  
921 6671 d 13 h jermar /kernel/trunk/arch/ia64/ ia64 work.
Userspace is now working.
There is an unrelated show stopper, however.		  
920 6671 d 13 h jermar /uspace/trunk/libc/arch/ia64/ Rewrite syscall wrapper in assembly.  
919 6671 d 18 h jermar /kernel/trunk/ ia64 work.
Changes to make userspace work (kernel part).
Use ski.conf from contrib directory to run Ski.

There is actually no appropriate syscall handler yet.		  
918 6671 d 18 h jermar /boot/trunk/ ia64 work.
Changes to make userspace work (boot part).		  
917 6671 d 18 h jermar /uspace/trunk/libc/arch/ia64/ ia64 work.
Changes to make userspace work (uspace part).		  
916 6673 d 20 h jermar /kernel/trunk/arch/ia64/src/ ia64 work.
Support switch from userspace register stack in heavyweight handler.		  
915 6673 d 21 h jermar /kernel/trunk/arch/ia64/ ia64 work.
- Another item had to be allocated on stack to remember new value written to ar.bspstore.
Fix heavyweight interruption handler to calculate RSC.loadrs from the new value of ar.bspstore
instead from the old one.
Uncomment instructions switching ar.bspstore.
- Configure kernel with 512M of memory.		  
914 6673 d 22 h decky /boot/trunk/arch/ppc32/loader/ flush caches  
913 6673 d 22 h decky /boot/trunk/arch/ppc32/loader/ ppc bootstrap almost working  
912 6675 d 10 h jermar /kernel/trunk/ ia64 work.

ivt.S:
Detect userspace stack in heavyweight handler and switch to kernel stack.
Remember the old stack pointer.
As for register stack, kernel stack is assumed still.
Fix alignment issues that showed when STACK_ITEMS was odd.
Fix ld8 instruction that did subtraction of 8 instead of addition of 8.

scheduler.c:
Change before_thread_runs_arch() to calculate address of top of the stack
for the interrupt handler.		  
911 6675 d 15 h jermar /kernel/trunk/arch/ia64/ ia64 work.

Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.

Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.

Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.)		  
910 6675 d 17 h bondari /kernel/trunk/ ELF framework for all archs. SPARC V9 not tested to compile.