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  1. /*
  2.  * Copyright (C) 2005 - 2006 Jakub Jermar
  3.  * Copyright (C) 2006 Jakub Vana
  4.  * All rights reserved.
  5.  *
  6.  * Redistribution and use in source and binary forms, with or without
  7.  * modification, are permitted provided that the following conditions
  8.  * are met:
  9.  *
  10.  * - Redistributions of source code must retain the above copyright
  11.  *   notice, this list of conditions and the following disclaimer.
  12.  * - Redistributions in binary form must reproduce the above copyright
  13.  *   notice, this list of conditions and the following disclaimer in the
  14.  *   documentation and/or other materials provided with the distribution.
  15.  * - The name of the author may not be used to endorse or promote products
  16.  *   derived from this software without specific prior written permission.
  17.  *
  18.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  27.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28.  */
  29.  
  30. #ifndef __ia64_PAGE_H__
  31. #define __ia64_PAGE_H__
  32.  
  33. #include <arch/mm/frame.h>
  34. #include <genarch/mm/page_ht.h>
  35. #include <arch/types.h>
  36. #include <typedefs.h>
  37. #include <debug.h>
  38.  
  39. #define PAGE_SIZE   FRAME_SIZE
  40. #define PAGE_WIDTH  FRAME_WIDTH
  41.  
  42. #define KA2PA(x)    ((__address) (x))
  43. #define PA2KA(x)    ((__address) (x))
  44.  
  45. #define GET_PTL0_ADDRESS_ARCH()         ((pte_t *) 0)
  46. #define SET_PTL0_ADDRESS_ARCH(ptl0)
  47.  
  48. /** Implementation of page hash table interface. */
  49. #define HT_ENTRIES_ARCH         0
  50. #define HT_HASH_ARCH(page, asid)    0
  51. #define HT_COMPARE_ARCH(page, asid, t)  0
  52. #define HT_SLOT_EMPTY_ARCH(t)       1
  53. #define HT_INVALIDATE_SLOT_ARCH(t)
  54. #define HT_GET_NEXT_ARCH(t)     0
  55. #define HT_SET_NEXT_ARCH(t, s)
  56. #define HT_SET_RECORD_ARCH(t, page, asid, frame, flags)
  57.  
  58. #define VRN_KERNEL          0
  59. #define REGION_REGISTERS        8
  60.  
  61. #define VHPT_WIDTH          20          /* 1M */
  62. #define VHPT_SIZE           (1<<VHPT_WIDTH)
  63.  
  64. #define VHPT_BASE           page_ht     /* Must be aligned to VHPT_SIZE */
  65.  
  66. struct vhpt_tag_info {
  67.     unsigned long long tag : 63;
  68.     unsigned ti : 1;
  69. } __attribute__ ((packed));
  70.  
  71. union vhpt_tag {
  72.     struct vhpt_tag_info tag_info;
  73.     unsigned tag_word;
  74. };
  75.  
  76. struct vhpt_entry_present {
  77.     /* Word 0 */
  78.     unsigned p : 1;
  79.     unsigned : 1;
  80.     unsigned ma : 3;
  81.     unsigned a : 1;
  82.     unsigned d : 1;
  83.     unsigned pl : 2;
  84.     unsigned ar : 3;
  85.     unsigned long long ppn : 38;
  86.     unsigned : 2;
  87.     unsigned ed : 1;
  88.     unsigned ig1 : 11;
  89.    
  90.     /* Word 1 */
  91.     unsigned : 2;
  92.     unsigned ps : 6;
  93.     unsigned key : 24;
  94.     unsigned : 32;
  95.    
  96.     /* Word 2 */
  97.     union vhpt_tag tag;
  98.    
  99.     /* Word 3 */                                                   
  100.     unsigned long long next : 64;   /**< Collision chain next pointer. */
  101. } __attribute__ ((packed));
  102.  
  103. struct vhpt_entry_not_present {
  104.     /* Word 0 */
  105.     unsigned p : 1;
  106.     unsigned long long ig0 : 52;
  107.     unsigned ig1 : 11;
  108.    
  109.     /* Word 1 */
  110.     unsigned : 2;
  111.     unsigned ps : 6;
  112.     unsigned long long ig2 : 56;
  113.  
  114.     /* Word 2 */
  115.     union vhpt_tag tag;
  116.    
  117.     /* Word 3 */                                                   
  118.     unsigned long long next : 64;   /**< Collision chain next pointer. */
  119.    
  120. } __attribute__ ((packed));
  121.  
  122. typedef union vhpt_entry {
  123.     struct vhpt_entry_present present;
  124.     struct vhpt_entry_not_present not_present;
  125. } vhpt_entry;
  126.  
  127. struct region_register_map {
  128.     unsigned ve : 1;
  129.     unsigned : 1;
  130.     unsigned ps : 6;
  131.     unsigned rid : 24;
  132.     unsigned : 32;
  133. } __attribute__ ((packed));
  134.  
  135. typedef union region_register {
  136.     struct region_register_map map;
  137.     unsigned long long word;
  138. } region_register;
  139.  
  140. struct pta_register_map {
  141.     unsigned ve : 1;
  142.     unsigned : 1;
  143.     unsigned size : 6;
  144.     unsigned vf : 1;
  145.     unsigned : 6;
  146.     unsigned long long base : 49;
  147. } __attribute__ ((packed));
  148.  
  149. typedef union pta_register {
  150.     struct pta_register_map map;
  151.     __u64 word;
  152. } pta_register;
  153.  
  154. /** Return Translation Hashed Entry Address.
  155.  *
  156.  * VRN bits are used to read RID (ASID) from one
  157.  * of the eight region registers registers.
  158.  *
  159.  * @param va Virtual address including VRN bits.
  160.  *
  161.  * @return Address of the head of VHPT collision chain.
  162.  */
  163. static inline __u64 thash(__u64 va)
  164. {
  165.     __u64 ret;
  166.  
  167.     __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
  168.  
  169.     return ret;
  170. }
  171.  
  172. /** Return Translation Hashed Entry Tag.
  173.  *
  174.  * VRN bits are used to read RID (ASID) from one
  175.  * of the eight region registers.
  176.  *
  177.  * @param va Virtual address including VRN bits.
  178.  *
  179.  * @return The unique tag for VPN and RID in the collision chain returned by thash().
  180.  */
  181. static inline __u64 ttag(__u64 va)
  182. {
  183.     __u64 ret;
  184.  
  185.     __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
  186.  
  187.     return ret;
  188. }
  189.  
  190. /** Read Region Register.
  191.  *
  192.  * @param i Region register index.
  193.  *
  194.  * @return Current contents of rr[i].
  195.  */
  196. static inline __u64 rr_read(index_t i)
  197. {
  198.     __u64 ret;
  199.    
  200. //  ASSERT(i < REGION_REGISTERS);
  201.     __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));
  202.    
  203.     return ret;
  204. }
  205.  
  206.  
  207. /** Write Region Register.
  208.  *
  209.  * @param i Region register index.
  210.  * @param v Value to be written to rr[i].
  211.  */
  212. static inline void rr_write(index_t i, __u64 v)
  213. {
  214. //  ASSERT(i < REGION_REGISTERS);
  215.     __asm__ volatile ("mov rr[%0] = %1\n" : : "r" (i), "r" (v));
  216. }
  217.  
  218. /** Read Page Table Register.
  219.  *
  220.  * @return Current value stored in PTA.
  221.  */
  222. static inline __u64 pta_read(void)
  223. {
  224.     __u64 ret;
  225.    
  226.     __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
  227.    
  228.     return ret;
  229. }
  230.  
  231. /** Write Page Table Register.
  232.  *
  233.  * @param v New value to be stored in PTA.
  234.  */
  235. static inline void pta_write(__u64 v)
  236. {
  237.     __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
  238. }
  239.  
  240. extern void page_arch_init(void);
  241.  
  242. #endif
  243.