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  1. /*
  2.  * Copyright (C) 2001-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #include <arch.h>
  30.  
  31. #include <arch/types.h>
  32. #include <typedefs.h>
  33.  
  34. #include <arch/pm.h>
  35.  
  36. #include <arch/drivers/ega.h>
  37. #include <arch/vesa.h>
  38. #include <genarch/i8042/i8042.h>
  39. #include <arch/i8254.h>
  40. #include <arch/i8259.h>
  41.  
  42. #include <arch/context.h>
  43.  
  44. #include <config.h>
  45.  
  46. #include <arch/interrupt.h>
  47. #include <arch/asm.h>
  48. #include <genarch/acpi/acpi.h>
  49.  
  50. #include <arch/bios/bios.h>
  51.  
  52. #include <arch/mm/memory_init.h>
  53. #include <interrupt.h>
  54. #include <arch/debugger.h>
  55. #include <proc/thread.h>
  56. #include <syscall/syscall.h>
  57.  
  58. void arch_pre_mm_init(void)
  59. {
  60.     pm_init();
  61.  
  62.     if (config.cpu_active == 1) {
  63.         bios_init();
  64.         i8259_init();   /* PIC */
  65.         i8254_init();   /* hard clock */
  66.        
  67.         exc_register(VECTOR_SYSCALL, "syscall", (iroutine) syscall);
  68.        
  69.         #ifdef CONFIG_SMP
  70.         exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
  71.                  (iroutine) tlb_shootdown_ipi);
  72.         #endif /* CONFIG_SMP */
  73.     }
  74. }
  75.  
  76. void arch_post_mm_init(void)
  77. {
  78.     if (config.cpu_active == 1) {
  79.  
  80. #ifdef CONFIG_FB
  81.         if (vesa_present())
  82.             vesa_init();
  83.         else
  84. #endif
  85.             ega_init(); /* video */
  86.        
  87.        
  88.         /* Enable debugger */
  89.         debugger_init();
  90.         /* Merge all memory zones to 1 big zone */
  91.         zone_merge_all();
  92.     }
  93. }
  94.  
  95. void arch_pre_smp_init(void)
  96. {
  97.     if (config.cpu_active == 1) {
  98.         memory_print_map();
  99.        
  100.         #ifdef CONFIG_SMP
  101.         acpi_init();
  102.         #endif /* CONFIG_SMP */
  103.     }
  104. }
  105.  
  106. void arch_post_smp_init(void)
  107. {
  108.     i8042_init();   /* keyboard controller */
  109. }
  110.  
  111. void calibrate_delay_loop(void)
  112. {
  113.     i8254_calibrate_delay_loop();
  114.     if (config.cpu_active == 1) {
  115.         /*
  116.          * This has to be done only on UP.
  117.          * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
  118.          */
  119.         i8254_normal_operation();
  120.     }
  121. }
  122.  
  123. /** Set thread-local-storage pointer
  124.  *
  125.  * TLS pointer is set in GS register. That means, the GS contains
  126.  * selector, and the descriptor->base is the correct address.
  127.  */
  128. __native sys_tls_set(__native addr)
  129. {
  130.     THREAD->arch.tls = addr;
  131.     set_tls_desc(addr);
  132.  
  133.     return 0;
  134. }
  135.