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  1. /*
  2.  * Copyright (C) 2001-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #ifndef __APIC_H__
  30. #define __APIC_H__
  31.  
  32. #include <arch/types.h>
  33. #include <cpu.h>
  34.  
  35. #define FIXED       (0<<0)
  36. #define LOPRI       (1<<0)
  37.  
  38. /* local APIC macros */
  39. #define IPI_INIT    0
  40. #define IPI_STARTUP 0
  41.  
  42. /** Delivery modes. */
  43. #define DELMOD_FIXED    0x0
  44. #define DELMOD_LOWPRI   0x1
  45. #define DELMOD_SMI  0x2
  46. /* 0x3 reserved */
  47. #define DELMOD_NMI  0x4
  48. #define DELMOD_INIT 0x5
  49. #define DELMOD_STARTUP  0x6
  50. #define DELMOD_EXTINT   0x7
  51.  
  52. /** Destination modes. */
  53. #define DESTMOD_PHYS    0x0
  54. #define DESTMOD_LOGIC   0x1
  55.  
  56. /** Trigger Modes. */
  57. #define TRIGMOD_EDGE    0x0
  58. #define TRIGMOD_LEVEL   0x1
  59.  
  60. /** Levels. */
  61. #define LEVEL_DEASSERT  0x0
  62. #define LEVEL_ASSERT    0x1
  63.  
  64. /** Destination Shorthands. */
  65. #define SHORTHAND_NONE      0x0
  66. #define SHORTHAND_SELF      0x1
  67. #define SHORTHAND_ALL_INCL  0x2
  68. #define SHORTHAND_ALL_EXCL  0x3
  69.  
  70. /** Interrupt Input Pin Polarities. */
  71. #define POLARITY_HIGH   0x0
  72. #define POLARITY_LOW    0x1
  73.  
  74. #define SEND_PENDING    (1<<12)
  75.  
  76. /** Interrupt Command Register. */
  77. #define ICRlo       (0x300/sizeof(__u32))
  78. #define ICRhi       (0x310/sizeof(__u32))
  79. struct icr {
  80.     union {
  81.         __u32 lo;
  82.         struct {
  83.             __u8 vector;            /**< Interrupt Vector. */
  84.             unsigned delmod : 3;        /**< Delivery Mode. */
  85.             unsigned destmod : 1;       /**< Destination Mode. */
  86.             unsigned delivs : 1;        /**< Delivery status (RO). */
  87.             unsigned : 1;           /**< Reserved. */
  88.             unsigned level : 1;     /**< Level. */
  89.             unsigned trigger_mode : 1;  /**< Trigger Mode. */
  90.             unsigned : 2;           /**< Reserved. */
  91.             unsigned shorthand : 2;     /**< Destination Shorthand. */
  92.             unsigned : 12;          /**< Reserved. */
  93.         } __attribute__ ((packed));
  94.     };
  95.     union {
  96.         __u32 hi;
  97.         struct {
  98.             unsigned : 24;          /**< Reserved. */
  99.             __u8 dest;          /**< Destination field. */
  100.         } __attribute__ ((packed));
  101.     };
  102. } __attribute__ ((packed));
  103. typedef struct icr icr_t;
  104.  
  105. /* End Of Interrupt */
  106. #define EOI     (0x0b0/sizeof(__u32))
  107.  
  108. /* Error Status Register */
  109. #define ESR     (0x280/sizeof(__u32))
  110. #define ESRClear    ((0xffffff<<8)|(1<<4))
  111.  
  112. /* Task Priority Register */
  113. #define TPR     (0x080/sizeof(__u32))
  114. #define TPRClear    0xffffff00
  115.  
  116. /** Spurious-Interrupt Vector Register. */
  117. #define SVR     (0x0f0/sizeof(__u32))
  118. union svr {
  119.     __u32 value;
  120.     struct {
  121.         __u8 vector;            /**< Spurious Vector */
  122.         unsigned lapic_enabled : 1; /**< APIC Software Enable/Disable */
  123.         unsigned focus_checking : 1;    /**< Focus Processor Checking */
  124.         unsigned : 22;          /**< Reserved. */
  125.     } __attribute__ ((packed));
  126. };
  127. typedef union svr svr_t;
  128.  
  129. /* Time Divide Configuration Register */
  130. #define TDCR        (0x3e0/sizeof(__u32))
  131. #define TDCRClear   (~0xb)
  132.  
  133. /* Initial Count Register for Timer */
  134. #define ICRT        (0x380/sizeof(__u32))
  135.  
  136. /* Current Count Register for Timer */
  137. #define CCRT        (0x390/sizeof(__u32))
  138.  
  139. /** Timer Modes. */
  140. #define TIMER_ONESHOT   0x0
  141. #define TIMER_PERIODIC  0x1
  142.  
  143. /** LVT Timer register. */
  144. #define LVT_Tm      (0x320/sizeof(__u32))
  145. union lvt_tm {
  146.     __u32 value;
  147.     struct {
  148.         __u8 vector;        /**< Local Timer Interrupt vector. */
  149.         unsigned : 4;       /**< Reserved. */
  150.         unsigned delivs : 1;    /**< Delivery status (RO). */
  151.         unsigned : 3;       /**< Reserved. */
  152.         unsigned masked : 1;    /**< Interrupt Mask. */
  153.         unsigned mode : 1;  /**< Timer Mode. */
  154.         unsigned : 14;      /**< Reserved. */
  155.     } __attribute__ ((packed));
  156. };
  157. typedef union lvt_tm lvt_tm_t;
  158.  
  159. /** LVT LINT registers. */
  160. #define LVT_LINT0   (0x350/sizeof(__u32))
  161. #define LVT_LINT1   (0x360/sizeof(__u32))
  162. union lvt_lint {
  163.     __u32 value;
  164.     struct {
  165.         __u8 vector;            /**< LINT Interrupt vector. */
  166.         unsigned delmod : 3;        /**< Delivery Mode. */
  167.         unsigned : 1;           /**< Reserved. */
  168.         unsigned delivs : 1;        /**< Delivery status (RO). */
  169.         unsigned intpol : 1;        /**< Interrupt Input Pin Polarity. */
  170.         unsigned irr : 1;       /**< Remote IRR (RO). */
  171.         unsigned trigger_mode : 1;  /**< Trigger Mode. */
  172.         unsigned masked : 1;        /**< Interrupt Mask. */
  173.         unsigned : 15;          /**< Reserved. */
  174.     } __attribute__ ((packed));
  175. };
  176. typedef union lvt_lint lvt_lint_t;
  177.  
  178. /** LVT Error register. */
  179. #define LVT_Err     (0x370/sizeof(__u32))
  180. union lvt_error {
  181.     __u32 value;
  182.     struct {
  183.         __u8 vector;        /**< Local Timer Interrupt vector. */
  184.         unsigned : 4;       /**< Reserved. */
  185.         unsigned delivs : 1;    /**< Delivery status (RO). */
  186.         unsigned : 3;       /**< Reserved. */
  187.         unsigned masked : 1;    /**< Interrupt Mask. */
  188.         unsigned : 15;      /**< Reserved. */
  189.     } __attribute__ ((packed));
  190. };
  191. typedef union lvt_error lvt_error_t;
  192.  
  193.  
  194. #define LVT_PCINT   (0x340/sizeof(__u32))
  195.  
  196. /* Local APIC ID Register */
  197. #define L_APIC_ID   (0x020/sizeof(__u32))
  198. #define L_APIC_IDClear  (~(0xf<<24))
  199. #define L_APIC_IDShift  24
  200. #define L_APIC_IDMask   0xf
  201.  
  202. /* Local APIC Version Register */
  203. #define LAVR        (0x030/sizeof(__u32))
  204. #define LAVR_Mask   0xff
  205. #define is_local_apic(x)    (((x)&LAVR_Mask&0xf0)==0x1)
  206. #define is_82489DX_apic(x)  ((((x)&LAVR_Mask&0xf0)==0x0))
  207. #define is_local_xapic(x)   (((x)&LAVR_Mask)==0x14)
  208.  
  209. /* IO APIC */
  210. #define IOREGSEL    (0x00/sizeof(__u32))
  211. #define IOWIN       (0x10/sizeof(__u32))
  212.  
  213. #define IOAPICID    0x00
  214. #define IOAPICVER   0x01
  215. #define IOAPICARB   0x02
  216. #define IOREDTBL    0x10
  217.  
  218. /** I/O Redirection Register. */
  219. struct io_redirection_reg {
  220.     union {
  221.         __u32 lo;
  222.         struct {
  223.             __u8 intvec;            /**< Interrupt Vector. */
  224.             unsigned delmod : 3;        /**< Delivery Mode. */
  225.             unsigned destmod : 1;       /**< Destination mode. */
  226.             unsigned delivs : 1;        /**< Delivery status (RO). */
  227.             unsigned intpol : 1;        /**< Interrupt Input Pin Polarity. */
  228.             unsigned irr : 1;       /**< Remote IRR (RO). */
  229.             unsigned trigger_mode : 1;  /**< Trigger Mode. */
  230.             unsigned masked : 1;        /**< Interrupt Mask. */
  231.             unsigned : 15;          /**< Reserved. */
  232.         } __attribute__ ((packed));
  233.     };
  234.     union {
  235.         __u32 hi;
  236.         struct {
  237.             unsigned : 24;          /**< Reserved. */
  238.             __u8 dest : 8;      /**< Destination Field. */
  239.         } __attribute__ ((packed));
  240.     };
  241.    
  242. } __attribute__ ((packed));
  243.  
  244. typedef struct io_redirection_reg io_redirection_reg_t;
  245.  
  246. extern volatile __u32 *l_apic;
  247. extern volatile __u32 *io_apic;
  248.  
  249. extern __u32 apic_id_mask;
  250.  
  251. extern void apic_init(void);
  252. extern void apic_spurious(__u8 n, __native stack[]);
  253.  
  254. extern void l_apic_init(void);
  255. extern void l_apic_eoi(void);
  256. extern int l_apic_broadcast_custom_ipi(__u8 vector);
  257. extern int l_apic_send_init_ipi(__u8 apicid);
  258. extern void l_apic_debug(void);
  259. extern void l_apic_timer_interrupt(__u8 n, __native stack[]);
  260. extern __u8 l_apic_id(void);
  261.  
  262. extern __u32 io_apic_read(__u8 address);
  263. extern void io_apic_write(__u8 address , __u32 x);
  264. extern void io_apic_change_ioredtbl(int signal, int dest, __u8 v, int flags);
  265. extern void io_apic_disable_irqs(__u16 irqmask);
  266. extern void io_apic_enable_irqs(__u16 irqmask);
  267.  
  268. #endif
  269.