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  1. /*
  2.  * Copyright (C) 2005 Ondrej Palkovsky
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #include <arch.h>
  30.  
  31. #include <arch/types.h>
  32.  
  33. #include <config.h>
  34.  
  35. #include <arch/ega.h>
  36. #include <arch/i8042.h>
  37. #include <arch/i8254.h>
  38. #include <arch/i8259.h>
  39.  
  40. #include <arch/bios/bios.h>
  41. #include <arch/mm/memory_init.h>
  42. #include <arch/cpu.h>
  43. #include <print.h>
  44. #include <arch/cpuid.h>
  45. #include <genarch/acpi/acpi.h>
  46. #include <panic.h>
  47.  
  48. void arch_pre_mm_init(void)
  49. {
  50.     struct cpu_info cpuid_s;
  51.  
  52.     cpuid(AMD_CPUID_EXTENDED,&cpuid_s);
  53.     if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE)))
  54.         panic("Processor does not support No-execute pages.\n");
  55.  
  56.     cpuid(INTEL_CPUID_STANDARD,&cpuid_s);
  57.     if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE)))
  58.         panic("Processor does not support FXSAVE/FXRESTORE.\n");
  59.    
  60.     if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2)))
  61.         panic("Processor does not support SSE2 instructions.\n");
  62.  
  63.     /* Enable No-execute pages */
  64.     set_efer_flag(AMD_NXE_FLAG);
  65.     /* Enable FPU */
  66.     cpu_setup_fpu();
  67.  
  68.     pm_init();
  69.  
  70.     if (config.cpu_active == 1) {
  71.         bios_init();
  72.         i8042_init();   /* a20 bit */
  73.         i8259_init();   /* PIC */
  74.         i8254_init();   /* hard clock */
  75.  
  76.         trap_register(VECTOR_SYSCALL, syscall);
  77.        
  78.         #ifdef CONFIG_SMP
  79.         trap_register(VECTOR_TLB_SHOOTDOWN_IPI, tlb_shootdown_ipi);
  80.         trap_register(VECTOR_WAKEUP_IPI, wakeup_ipi);
  81.         #endif /* CONFIG_SMP */
  82.     }
  83. }
  84.  
  85. void arch_post_mm_init(void)
  86. {
  87.     if (config.cpu_active == 1) {
  88.         ega_init(); /* video */
  89.     }
  90. }
  91.  
  92. void arch_pre_smp_init(void)
  93. {
  94.     if (config.cpu_active == 1) {
  95.         memory_print_map();
  96.        
  97.         #ifdef CONFIG_SMP
  98.         acpi_init();
  99.         #endif /* CONFIG_SMP */
  100.     }
  101. }
  102.  
  103. void arch_post_smp_init(void)
  104. {
  105. }
  106.  
  107. void calibrate_delay_loop(void)
  108. {
  109.     i8254_calibrate_delay_loop();
  110.     i8254_normal_operation();
  111. }
  112.