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  1. /*
  2.  * Copyright (C) 2005 Ondrej Palkovsky
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #include <arch.h>
  30.  
  31. #include <arch/types.h>
  32.  
  33. #include <config.h>
  34.  
  35. #include <arch/ega.h>
  36. #include <genarch/i8042/i8042.h>
  37. #include <arch/i8254.h>
  38. #include <arch/i8259.h>
  39.  
  40. #include <arch/bios/bios.h>
  41. #include <arch/mm/memory_init.h>
  42. #include <arch/cpu.h>
  43. #include <print.h>
  44. #include <arch/cpuid.h>
  45. #include <genarch/acpi/acpi.h>
  46. #include <panic.h>
  47. #include <interrupt.h>
  48. #include <arch/syscall.h>
  49. #include <arch/debugger.h>
  50.  
  51. /** Disable I/O on non-privileged levels
  52.  *
  53.  * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
  54.  */
  55. static void clean_IOPL_NT_flags(void)
  56. {
  57.     asm
  58.     (
  59.         "pushfq;"
  60.         "pop %%rax;"
  61.         "and $~(0x7000),%%rax;"
  62.         "pushq %%rax;"
  63.         "popfq;"
  64.         :
  65.         :
  66.         :"%rax"
  67.     );
  68. }
  69.  
  70. /** Disable alignment check
  71.  *
  72.  * Clean AM(18) flag in CR0 register
  73.  */
  74. static void clean_AM_flag(void)
  75. {
  76.     asm
  77.     (
  78.         "mov %%cr0,%%rax;"
  79.         "and $~(0x40000),%%rax;"
  80.         "mov %%rax,%%cr0;"
  81.         :
  82.         :
  83.         :"%rax"
  84.     );
  85. }
  86.  
  87. void arch_pre_mm_init(void)
  88. {
  89.     struct cpu_info cpuid_s;
  90.  
  91.     cpuid(AMD_CPUID_EXTENDED,&cpuid_s);
  92.     if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE)))
  93.         panic("Processor does not support No-execute pages.\n");
  94.  
  95.     cpuid(INTEL_CPUID_STANDARD,&cpuid_s);
  96.     if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE)))
  97.         panic("Processor does not support FXSAVE/FXRESTORE.\n");
  98.    
  99.     if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2)))
  100.         panic("Processor does not support SSE2 instructions.\n");
  101.  
  102.     /* Enable No-execute pages */
  103.     set_efer_flag(AMD_NXE_FLAG);
  104.     /* Enable FPU */
  105.     cpu_setup_fpu();
  106.  
  107.     /* Initialize segmentation */
  108.     pm_init();
  109.  
  110.         /* Disable I/O on nonprivileged levels
  111.      * clear the NT(nested-thread) flag
  112.      */
  113.     clean_IOPL_NT_flags();
  114.     /* Disable alignment check */
  115.     clean_AM_flag();
  116.  
  117.     if (config.cpu_active == 1) {
  118.         bios_init();
  119.         i8259_init();   /* PIC */
  120.         i8254_init();   /* hard clock */
  121.  
  122.         #ifdef CONFIG_SMP
  123.         exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
  124.                  tlb_shootdown_ipi);
  125.         #endif /* CONFIG_SMP */
  126.     }
  127. }
  128.  
  129. void arch_post_mm_init(void)
  130. {
  131.     if (config.cpu_active == 1) {
  132.         ega_init(); /* video */
  133.         /* Enable debugger */
  134.         debugger_init();
  135.     }
  136.     /* Setup fast SYSCALL/SYSRET */
  137.     syscall_setup_cpu();
  138.    
  139. }
  140.  
  141. void arch_pre_smp_init(void)
  142. {
  143.     if (config.cpu_active == 1) {
  144.         memory_print_map();
  145.        
  146.         #ifdef CONFIG_SMP
  147.         acpi_init();
  148.         #endif /* CONFIG_SMP */
  149.     }
  150. }
  151.  
  152. void arch_post_smp_init(void)
  153. {
  154.     i8042_init();   /* keyboard controller */
  155. }
  156.  
  157. void calibrate_delay_loop(void)
  158. {
  159.     i8254_calibrate_delay_loop();
  160.     i8254_normal_operation();
  161. }
  162.