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  1. /*
  2.  * Copyright (C) 2001-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #ifndef __ia32_ASM_H__
  30. #define __ia32_ASM_H__
  31.  
  32. #include <arch/types.h>
  33. #include <config.h>
  34.  
  35. extern __u32 interrupt_handler_size;
  36.  
  37. extern void paging_on(void);
  38.  
  39. extern void interrupt_handlers(void);
  40.  
  41. extern __u8 inb(int port);
  42. extern __u16 inw(int port);
  43. extern __u32 inl(int port);
  44.  
  45. extern void outb(int port, __u8 b);
  46. extern void outw(int port, __u16 w);
  47. extern void outl(int port, __u32 l);
  48.  
  49. extern void enable_l_apic_in_msr(void);
  50.  
  51.  
  52. void asm_delay_loop(__u32 t);
  53. void asm_fake_loop(__u32 t);
  54.  
  55.  
  56. /** Halt CPU
  57.  *
  58.  * Halt the current CPU until interrupt event.
  59.  */
  60. static inline void cpu_halt(void) { __asm__("hlt\n"); };
  61. static inline void cpu_sleep(void) { __asm__("hlt\n"); };
  62.  
  63. /** Read CR2
  64.  *
  65.  * Return value in CR2
  66.  *
  67.  * @return Value read.
  68.  */
  69. static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; }
  70.  
  71. /** Write CR3
  72.  *
  73.  * Write value to CR3.
  74.  *
  75.  * @param v Value to be written.
  76.  */
  77. static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
  78.  
  79. /** Read CR3
  80.  *
  81.  * Return value in CR3
  82.  *
  83.  * @return Value read.
  84.  */
  85. static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; }
  86.  
  87. /** Set priority level low
  88.  *
  89.  * Enable interrupts and return previous
  90.  * value of EFLAGS.
  91.  */
  92. static inline pri_t cpu_priority_low(void) {
  93.     pri_t v;
  94.     __asm__ volatile (
  95.         "pushf\n"
  96.         "popl %0\n"
  97.         "sti\n"
  98.         : "=r" (v)
  99.     );
  100.     return v;
  101. }
  102.  
  103. /** Set priority level high
  104.  *
  105.  * Disable interrupts and return previous
  106.  * value of EFLAGS.
  107.  */
  108. static inline pri_t cpu_priority_high(void) {
  109.     pri_t v;
  110.     __asm__ volatile (
  111.         "pushf\n"
  112.         "popl %0\n"
  113.         "cli\n"
  114.         : "=r" (v)
  115.     );
  116.     return v;
  117. }
  118.  
  119. /** Restore priority level
  120.  *
  121.  * Restore EFLAGS.
  122.  */
  123. static inline void cpu_priority_restore(pri_t pri) {
  124.     __asm__ volatile (
  125.         "pushl %0\n"
  126.         "popf\n"
  127.         : : "r" (pri)
  128.     );
  129. }
  130.  
  131. /** Return raw priority level
  132.  *
  133.  * Return EFLAFS.
  134.  */
  135. static inline pri_t cpu_priority_read(void) {
  136.     pri_t v;
  137.     __asm__ volatile (
  138.         "pushf\n"
  139.         "popl %0\n"
  140.         : "=r" (v)
  141.     );
  142.     return v;
  143. }
  144.  
  145. /** Return base address of current stack
  146.  *
  147.  * Return the base address of the current stack.
  148.  * The stack is assumed to be STACK_SIZE bytes long.
  149.  * The stack must start on page boundary.
  150.  */
  151. static inline __address get_stack_base(void)
  152. {
  153.     __address v;
  154.    
  155.     __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
  156.    
  157.     return v;
  158. }
  159.  
  160. static inline __u64 rdtsc(void)
  161. {
  162.     __u64 v;
  163.    
  164.     __asm__ volatile("rdtsc\n" : "=A" (v));
  165.    
  166.     return v;
  167. }
  168.  
  169. #endif
  170.