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  1. /*
  2.  * Copyright (C) 2005 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup sparc64
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch.h>
  36. #include <debug.h>
  37. #include <arch/trap/trap.h>
  38. #include <arch/console.h>
  39. #include <arch/drivers/tick.h>
  40. #include <proc/thread.h>
  41. #include <console/console.h>
  42. #include <arch/boot/boot.h>
  43. #include <arch/arch.h>
  44. #include <arch/mm/tlb.h>
  45. #include <mm/asid.h>
  46.  
  47. bootinfo_t bootinfo;
  48.  
  49. void arch_pre_mm_init(void)
  50. {
  51.     trap_init();
  52.     tick_init();
  53. }
  54.  
  55. void arch_post_mm_init(void)
  56. {
  57.     standalone_sparc64_console_init();
  58. }
  59.  
  60. void arch_pre_smp_init(void)
  61. {
  62. }
  63.  
  64. void arch_post_smp_init(void)
  65. {
  66.     thread_t *t;
  67.  
  68.     /*
  69.          * Create thread that polls keyboard.
  70.          */
  71.     t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll");
  72.     if (!t)
  73.         panic("cannot create kkbdpoll\n");
  74.     thread_ready(t);
  75. }
  76.  
  77. void calibrate_delay_loop(void)
  78. {
  79. }
  80.  
  81. /** Acquire console back for kernel
  82.  *
  83.  */
  84. void arch_grab_console(void)
  85. {
  86. }
  87. /** Return console to userspace
  88.  *
  89.  */
  90. void arch_release_console(void)
  91. {
  92. }
  93.  
  94. /** Take over TLB and trap table.
  95.  *
  96.  * Initialize ITLB and DTLB and switch to kernel
  97.  * trap table.
  98.  *
  99.  * The goal of this function is to disable MMU
  100.  * so that both TLBs can be purged and new
  101.  * kernel 4M locked entry can be installed.
  102.  * After TLB is initialized, MMU is enabled
  103.  * again.
  104.  *
  105.  * Switching MMU off imposes the requirement for
  106.  * the kernel to run in identity mapped environment.
  107.  *
  108.  * @param base Base address that will be hardwired in both TLBs.
  109.  */
  110. void take_over_tlb_and_tt(uintptr_t base)
  111. {
  112.     tlb_tag_access_reg_t tag;
  113.     tlb_data_t data;
  114.     frame_address_t fr;
  115.     page_address_t pg;
  116.  
  117.     fr.address = base;
  118.     pg.address = base;
  119.  
  120.     immu_disable();
  121.     dmmu_disable();
  122.  
  123.     /*
  124.      * Demap everything, especially OpenFirmware.
  125.      */
  126.     itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
  127.     dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
  128.    
  129.     /*
  130.      * We do identity mapping of 4M-page at 4M.
  131.      */
  132.     tag.value = ASID_KERNEL;
  133.     tag.vpn = pg.vpn;
  134.  
  135.     itlb_tag_access_write(tag.value);
  136.     dtlb_tag_access_write(tag.value);
  137.  
  138.     data.value = 0;
  139.     data.v = true;
  140.     data.size = PAGESIZE_4M;
  141.     data.pfn = fr.pfn;
  142.     data.l = true;
  143.     data.cp = 1;
  144.     data.cv = 1;
  145.     data.p = true;
  146.     data.w = true;
  147.     data.g = true;
  148.  
  149.     itlb_data_in_write(data.value);
  150.     dtlb_data_in_write(data.value);
  151.  
  152.     /*
  153.      * Register window traps can occur before MMU is enabled again.
  154.      * This ensures that any such traps will be handled from
  155.      * kernel identity mapped trap handler.
  156.      */
  157.     trap_switch_trap_table();
  158.    
  159.     tlb_invalidate_all();
  160.  
  161.     dmmu_enable();
  162.     immu_enable();
  163. }
  164.  
  165. /** @}
  166.  */
  167.