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  1. /*
  2.  * Copyright (C) 2006 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup sparc64mm
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch/mm/as.h>
  36. #include <arch/mm/tlb.h>
  37. #include <genarch/mm/as_ht.h>
  38. #include <genarch/mm/asid_fifo.h>
  39. #include <debug.h>
  40.  
  41. #ifdef CONFIG_TSB
  42. #include <arch/mm/tsb.h>
  43. #endif
  44.  
  45. /** Architecture dependent address space init. */
  46. void as_arch_init(void)
  47. {
  48.     as_operations = &as_ht_operations;
  49.     asid_fifo_init();
  50. }
  51.  
  52. /** Perform sparc64-specific tasks when an address space becomes active on the processor.
  53.  *
  54.  * Install ASID and map TSBs.
  55.  *
  56.  * @param as Address space.
  57.  */
  58. void as_install_arch(as_t *as)
  59. {
  60.     tlb_context_reg_t ctx;
  61.    
  62.     /*
  63.      * Note that we don't lock the address space.
  64.      * That's correct - we can afford it here
  65.      * because we only read members that are
  66.      * currently read-only.
  67.      */
  68.    
  69.     /*
  70.      * Write ASID to secondary context register.
  71.      * The primary context register has to be set
  72.      * from TL>0 so it will be filled from the
  73.      * secondary context register from the TL=1
  74.      * code just before switch to userspace.
  75.      */
  76.     ctx.v = 0;
  77.     ctx.context = as->asid;
  78.     mmu_secondary_context_write(ctx.v);
  79.  
  80. #ifdef CONFIG_TSB  
  81.     if (as != AS_KERNEL) {
  82.         uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
  83.  
  84.         ASSERT(as->arch.itsb && as->arch.dtsb);
  85.  
  86.         uintptr_t tsb = as->arch.itsb;
  87.        
  88.         if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
  89.             /*
  90.              * TSBs were allocated from memory not covered
  91.              * by the locked 4M kernel DTLB entry. We need
  92.              * to map both TSBs explicitly.
  93.              */
  94.             dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
  95.             dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
  96.         }
  97.        
  98.         /*
  99.          * Setup TSB Base registers.
  100.          */
  101.         tsb_base_reg_t tsb_base;
  102.        
  103.         tsb_base.value = 0;
  104.         tsb_base.size = TSB_SIZE;
  105.         tsb_base.split = 0;
  106.  
  107.         tsb_base.base = as->arch.itsb >> PAGE_WIDTH;
  108.         itsb_base_write(tsb_base.value);
  109.         tsb_base.base = as->arch.dtsb >> PAGE_WIDTH;
  110.         dtsb_base_write(tsb_base.value);
  111.     }
  112. #endif
  113. }
  114.  
  115. /** Perform sparc64-specific tasks when an address space is removed from the processor.
  116.  *
  117.  * Demap TSBs.
  118.  *
  119.  * @param as Address space.
  120.  */
  121. void as_deinstall_arch(as_t *as)
  122. {
  123.  
  124.     /*
  125.      * Note that we don't lock the address space.
  126.      * That's correct - we can afford it here
  127.      * because we only read members that are
  128.      * currently read-only.
  129.      */
  130.  
  131. #ifdef CONFIG_TSB
  132.     if (as != AS_KERNEL) {
  133.         uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
  134.  
  135.         ASSERT(as->arch.itsb && as->arch.dtsb);
  136.  
  137.         uintptr_t tsb = as->arch.itsb;
  138.        
  139.         if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
  140.             /*
  141.              * TSBs were allocated from memory not covered
  142.              * by the locked 4M kernel DTLB entry. We need
  143.              * to demap the entry installed by as_install_arch().
  144.              */
  145.             dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
  146.         }
  147.        
  148.     }
  149. #endif
  150. }
  151.  
  152. /** @}
  153.  */
  154.