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  1. /*
  2.  * Copyright (C) 2006 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup sparc64mm
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch/mm/as.h>
  36. #include <arch/mm/tlb.h>
  37. #include <genarch/mm/as_ht.h>
  38. #include <genarch/mm/asid_fifo.h>
  39. #include <debug.h>
  40. #include <config.h>
  41.  
  42. #ifdef CONFIG_TSB
  43. #include <arch/mm/tsb.h>
  44. #include <arch/memstr.h>
  45. #include <synch/mutex.h>
  46. #include <arch/asm.h>
  47. #include <mm/frame.h>
  48. #include <bitops.h>
  49. #include <macros.h>
  50. #endif
  51.  
  52. /** Architecture dependent address space init. */
  53. void as_arch_init(void)
  54. {
  55.     if (config.cpu_active == 1) {
  56.         as_operations = &as_ht_operations;
  57.         asid_fifo_init();
  58.     }
  59. }
  60.  
  61. int as_constructor_arch(as_t *as, int flags)
  62. {
  63. #ifdef CONFIG_TSB
  64.     int order = fnzb32(((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH);
  65.     uintptr_t tsb = (uintptr_t) frame_alloc(order, flags);
  66.  
  67.     if (!tsb)
  68.         return -1;
  69.  
  70.     as->arch.itsb = (tsb_entry_t *) tsb;
  71.     as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT * sizeof(tsb_entry_t));
  72.     memsetb((uintptr_t) as->arch.itsb, (ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t), 0);
  73. #endif
  74.     return 0;
  75. }
  76.  
  77. int as_destructor_arch(as_t *as)
  78. {
  79. #ifdef CONFIG_TSB
  80.     count_t cnt = ((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH;
  81.     frame_free((uintptr_t) as->arch.itsb);
  82.     return cnt;
  83. #else
  84.     return 0;
  85. #endif
  86. }
  87.  
  88. int as_create_arch(as_t *as, int flags)
  89. {
  90. #ifdef CONFIG_TSB
  91.     ipl_t ipl;
  92.  
  93.     ipl = interrupts_disable();
  94.     mutex_lock_active(&as->lock);   /* completely unnecessary, but polite */
  95.     tsb_invalidate(as, 0, (count_t) -1);
  96.     mutex_unlock(&as->lock);
  97.     interrupts_restore(ipl);
  98. #endif
  99.     return 0;
  100. }
  101.  
  102. /** Perform sparc64-specific tasks when an address space becomes active on the processor.
  103.  *
  104.  * Install ASID and map TSBs.
  105.  *
  106.  * @param as Address space.
  107.  */
  108. void as_install_arch(as_t *as)
  109. {
  110.     tlb_context_reg_t ctx;
  111.    
  112.     /*
  113.      * Note that we don't lock the address space.
  114.      * That's correct - we can afford it here
  115.      * because we only read members that are
  116.      * currently read-only.
  117.      */
  118.    
  119.     /*
  120.      * Write ASID to secondary context register.
  121.      * The primary context register has to be set
  122.      * from TL>0 so it will be filled from the
  123.      * secondary context register from the TL=1
  124.      * code just before switch to userspace.
  125.      */
  126.     ctx.v = 0;
  127.     ctx.context = as->asid;
  128.     mmu_secondary_context_write(ctx.v);
  129.  
  130. #ifdef CONFIG_TSB  
  131.     uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
  132.  
  133.     ASSERT(as->arch.itsb && as->arch.dtsb);
  134.  
  135.     uintptr_t tsb = (uintptr_t) as->arch.itsb;
  136.        
  137.     if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
  138.         /*
  139.          * TSBs were allocated from memory not covered
  140.          * by the locked 4M kernel DTLB entry. We need
  141.          * to map both TSBs explicitly.
  142.          */
  143.         dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
  144.         dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
  145.     }
  146.        
  147.     /*
  148.      * Setup TSB Base registers.
  149.      */
  150.     tsb_base_reg_t tsb_base;
  151.        
  152.     tsb_base.value = 0;
  153.     tsb_base.size = TSB_SIZE;
  154.     tsb_base.split = 0;
  155.  
  156.     tsb_base.base = ((uintptr_t) as->arch.itsb) >> PAGE_WIDTH;
  157.     itsb_base_write(tsb_base.value);
  158.     tsb_base.base = ((uintptr_t) as->arch.dtsb) >> PAGE_WIDTH;
  159.     dtsb_base_write(tsb_base.value);
  160. #endif
  161. }
  162.  
  163. /** Perform sparc64-specific tasks when an address space is removed from the processor.
  164.  *
  165.  * Demap TSBs.
  166.  *
  167.  * @param as Address space.
  168.  */
  169. void as_deinstall_arch(as_t *as)
  170. {
  171.  
  172.     /*
  173.      * Note that we don't lock the address space.
  174.      * That's correct - we can afford it here
  175.      * because we only read members that are
  176.      * currently read-only.
  177.      */
  178.  
  179. #ifdef CONFIG_TSB
  180.     uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
  181.  
  182.     ASSERT(as->arch.itsb && as->arch.dtsb);
  183.  
  184.     uintptr_t tsb = (uintptr_t) as->arch.itsb;
  185.        
  186.     if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
  187.         /*
  188.          * TSBs were allocated from memory not covered
  189.          * by the locked 4M kernel DTLB entry. We need
  190.          * to demap the entry installed by as_install_arch().
  191.          */
  192.         dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
  193.     }
  194. #endif
  195. }
  196.  
  197. /** @}
  198.  */
  199.