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  1. /*
  2.  * Copyright (c) 2006 Martin Decky
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup ppc32mm
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <mm/tlb.h>
  36. #include <arch/mm/tlb.h>
  37. #include <arch/interrupt.h>
  38. #include <interrupt.h>
  39. #include <mm/as.h>
  40. #include <arch.h>
  41. #include <print.h>
  42. #include <symtab.h>
  43.  
  44.  
  45. /** Try to find PTE for faulting address
  46.  *
  47.  * Try to find PTE for faulting address.
  48.  * The as->lock must be held on entry to this function
  49.  * if lock is true.
  50.  *
  51.  * @param as        Address space.
  52.  * @param lock      Lock/unlock the address space.
  53.  * @param badvaddr  Faulting virtual address.
  54.  * @param access    Access mode that caused the fault.
  55.  * @param istate    Pointer to interrupted state.
  56.  * @param pfrc      Pointer to variable where as_page_fault() return code
  57.  *          will be stored.
  58.  * @return      PTE on success, NULL otherwise.
  59.  *
  60.  */
  61. static pte_t *
  62. find_mapping_and_check(as_t *as, bool lock, uintptr_t badvaddr, int access,
  63.     istate_t *istate, int *pfrc)
  64. {
  65.     /*
  66.      * Check if the mapping exists in page tables.
  67.      */
  68.     pte_t *pte = page_mapping_find(as, badvaddr);
  69.     if ((pte) && (pte->present)) {
  70.         /*
  71.          * Mapping found in page tables.
  72.          * Immediately succeed.
  73.          */
  74.         return pte;
  75.     } else {
  76.         int rc;
  77.    
  78.         /*
  79.          * Mapping not found in page tables.
  80.          * Resort to higher-level page fault handler.
  81.          */
  82.         page_table_unlock(as, lock);
  83.         switch (rc = as_page_fault(badvaddr, access, istate)) {
  84.         case AS_PF_OK:
  85.             /*
  86.              * The higher-level page fault handler succeeded,
  87.              * The mapping ought to be in place.
  88.              */
  89.             page_table_lock(as, lock);
  90.             pte = page_mapping_find(as, badvaddr);
  91.             ASSERT((pte) && (pte->present));
  92.             *pfrc = 0;
  93.             return pte;
  94.         case AS_PF_DEFER:
  95.             page_table_lock(as, lock);
  96.             *pfrc = rc;
  97.             return NULL;
  98.         case AS_PF_FAULT:
  99.             page_table_lock(as, lock);
  100.             *pfrc = rc;
  101.             return NULL;
  102.         default:
  103.             panic("Unexpected rc (%d).", rc);
  104.         }  
  105.     }
  106. }
  107.  
  108.  
  109. static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate)
  110. {
  111.     char *symbol = "";
  112.     char *sym2 = "";
  113.  
  114.     char *str = get_symtab_entry(istate->pc);
  115.     if (str)
  116.         symbol = str;
  117.     str = get_symtab_entry(istate->lr);
  118.     if (str)
  119.         sym2 = str;
  120.  
  121.     fault_if_from_uspace(istate,
  122.         "PHT Refill Exception on %p.", badvaddr);
  123.     panic("%p: PHT Refill Exception at %p (%s<-%s).", badvaddr,
  124.         istate->pc, symbol, sym2);
  125. }
  126.  
  127.  
  128. static void pht_insert(const uintptr_t vaddr, const pte_t *pte)
  129. {
  130.     uint32_t page = (vaddr >> 12) & 0xffff;
  131.     uint32_t api = (vaddr >> 22) & 0x3f;
  132.    
  133.     uint32_t vsid;
  134.     asm volatile (
  135.         "mfsrin %0, %1\n"
  136.         : "=r" (vsid)
  137.         : "r" (vaddr)
  138.     );
  139.    
  140.     uint32_t sdr1;
  141.     asm volatile (
  142.         "mfsdr1 %0\n"
  143.         : "=r" (sdr1)
  144.     );
  145.     phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
  146.    
  147.     /* Primary hash (xor) */
  148.     uint32_t h = 0;
  149.     uint32_t hash = vsid ^ page;
  150.     uint32_t base = (hash & 0x3ff) << 3;
  151.     uint32_t i;
  152.     bool found = false;
  153.    
  154.     /* Find unused or colliding PTE in PTEG */
  155.     for (i = 0; i < 8; i++) {
  156.         if ((!phte[base + i].v) ||
  157.             ((phte[base + i].vsid == vsid)
  158.             && (phte[base + i].api == api)
  159.             && (phte[base + i].h == 0))) {
  160.             found = true;
  161.             break;
  162.         }
  163.     }
  164.    
  165.     if (!found) {
  166.         /* Secondary hash (not) */
  167.         uint32_t base2 = (~hash & 0x3ff) << 3;
  168.        
  169.         /* Find unused or colliding PTE in PTEG */
  170.         for (i = 0; i < 8; i++) {
  171.             if ((!phte[base2 + i].v) ||
  172.                 ((phte[base2 + i].vsid == vsid)
  173.                 && (phte[base2 + i].api == api)
  174.                 && (phte[base2 + i].h == 1))) {
  175.                 found = true;
  176.                 base = base2;
  177.                 h = 1;
  178.                 break;
  179.             }
  180.         }
  181.        
  182.         if (!found)
  183.             i = page % 8;
  184.     }
  185.    
  186.    
  187.    
  188.     phte[base + i].v = 1;
  189.     phte[base + i].vsid = vsid;
  190.     phte[base + i].h = h;
  191.     phte[base + i].api = api;
  192.     phte[base + i].rpn = pte->pfn;
  193.     phte[base + i].r = 0;
  194.     phte[base + i].c = 0;
  195.     phte[base + i].wimg = (pte->page_cache_disable ? WIMG_NO_CACHE : 0);
  196.     phte[base + i].pp = 2; // FIXME
  197. }
  198.  
  199.  
  200. static void pht_real_insert(const uintptr_t vaddr, const pfn_t pfn)
  201. {
  202.     uint32_t page = (vaddr >> 12) & 0xffff;
  203.     uint32_t api = (vaddr >> 22) & 0x3f;
  204.    
  205.     uint32_t vsid;
  206.     asm volatile (
  207.         "mfsrin %0, %1\n"
  208.         : "=r" (vsid)
  209.         : "r" (vaddr)
  210.     );
  211.    
  212.     uint32_t sdr1;
  213.     asm volatile (
  214.         "mfsdr1 %0\n"
  215.         : "=r" (sdr1)
  216.     );
  217.     phte_t *phte_physical = (phte_t *) (sdr1 & 0xffff0000);
  218.    
  219.     /* Primary hash (xor) */
  220.     uint32_t h = 0;
  221.     uint32_t hash = vsid ^ page;
  222.     uint32_t base = (hash & 0x3ff) << 3;
  223.     uint32_t i;
  224.     bool found = false;
  225.    
  226.     /* Find unused or colliding PTE in PTEG */
  227.     for (i = 0; i < 8; i++) {
  228.         if ((!phte_physical[base + i].v) ||
  229.             ((phte_physical[base + i].vsid == vsid)
  230.             && (phte_physical[base + i].api == api)
  231.             && (phte_physical[base + i].h == 0))) {
  232.             found = true;
  233.             break;
  234.         }
  235.     }
  236.    
  237.     if (!found) {
  238.         /* Secondary hash (not) */
  239.         uint32_t base2 = (~hash & 0x3ff) << 3;
  240.        
  241.         /* Find unused or colliding PTE in PTEG */
  242.         for (i = 0; i < 8; i++) {
  243.             if ((!phte_physical[base2 + i].v) ||
  244.                 ((phte_physical[base2 + i].vsid == vsid)
  245.                 && (phte_physical[base2 + i].api == api)
  246.                 && (phte_physical[base2 + i].h == 1))) {
  247.                 found = true;
  248.                 base = base2;
  249.                 h = 1;
  250.                 break;
  251.             }
  252.         }
  253.        
  254.         if (!found) {
  255.             i = page % 8;
  256.             base = base2;
  257.             h = 1;
  258.         }
  259.     }
  260.    
  261.     phte_physical[base + i].v = 1;
  262.     phte_physical[base + i].vsid = vsid;
  263.     phte_physical[base + i].h = h;
  264.     phte_physical[base + i].api = api;
  265.     phte_physical[base + i].rpn = pfn;
  266.     phte_physical[base + i].r = 0;
  267.     phte_physical[base + i].c = 0;
  268.     phte_physical[base + i].wimg = 0;
  269.     phte_physical[base + i].pp = 2; // FIXME
  270. }
  271.  
  272.  
  273. /** Process Instruction/Data Storage Interrupt
  274.  *
  275.  * @param n     Interrupt vector number.
  276.  * @param istate    Interrupted register context.
  277.  *
  278.  */
  279. void pht_refill(int n, istate_t *istate)
  280. {
  281.     uintptr_t badvaddr;
  282.     pte_t *pte;
  283.     int pfrc;
  284.     as_t *as;
  285.     bool lock;
  286.    
  287.     if (AS == NULL) {
  288.         as = AS_KERNEL;
  289.         lock = false;
  290.     } else {
  291.         as = AS;
  292.         lock = true;
  293.     }
  294.    
  295.     if (n == VECTOR_DATA_STORAGE)
  296.         badvaddr = istate->dar;
  297.     else
  298.         badvaddr = istate->pc;
  299.        
  300.     page_table_lock(as, lock);
  301.    
  302.     pte = find_mapping_and_check(as, lock, badvaddr,
  303.         PF_ACCESS_READ /* FIXME */, istate, &pfrc);
  304.     if (!pte) {
  305.         switch (pfrc) {
  306.         case AS_PF_FAULT:
  307.             goto fail;
  308.             break;
  309.         case AS_PF_DEFER:
  310.             /*
  311.              * The page fault came during copy_from_uspace()
  312.              * or copy_to_uspace().
  313.              */
  314.             page_table_unlock(as, lock);
  315.             return;
  316.         default:
  317.             panic("Unexpected pfrc (%d).", pfrc);
  318.         }
  319.     }
  320.    
  321.     pte->accessed = 1; /* Record access to PTE */
  322.     pht_insert(badvaddr, pte);
  323.    
  324.     page_table_unlock(as, lock);
  325.     return;
  326.    
  327. fail:
  328.     page_table_unlock(as, lock);
  329.     pht_refill_fail(badvaddr, istate);
  330. }
  331.  
  332.  
  333. /** Process Instruction/Data Storage Interrupt in Real Mode
  334.  *
  335.  * @param n     Interrupt vector number.
  336.  * @param istate    Interrupted register context.
  337.  *
  338.  */
  339. bool pht_real_refill(int n, istate_t *istate)
  340. {
  341.     uintptr_t badvaddr;
  342.    
  343.     if (n == VECTOR_DATA_STORAGE)
  344.         badvaddr = istate->dar;
  345.     else
  346.         badvaddr = istate->pc;
  347.    
  348.     uint32_t physmem;
  349.     asm volatile (
  350.         "mfsprg3 %0\n"
  351.         : "=r" (physmem)
  352.     );
  353.    
  354.     if ((badvaddr >= PA2KA(0)) && (badvaddr < PA2KA(physmem))) {
  355.         pht_real_insert(badvaddr, KA2PA(badvaddr) >> 12);
  356.         return true;
  357.     }
  358.    
  359.     return false;
  360. }
  361.  
  362.  
  363. void tlb_arch_init(void)
  364. {
  365.     tlb_invalidate_all();
  366. }
  367.  
  368.  
  369. void tlb_invalidate_all(void)
  370. {
  371.     asm volatile (
  372.         "tlbsync\n"
  373.     );
  374. }
  375.  
  376.  
  377. void tlb_invalidate_asid(asid_t asid)
  378. {
  379.     uint32_t sdr1;
  380.     asm volatile (
  381.         "mfsdr1 %0\n"
  382.         : "=r" (sdr1)
  383.     );
  384.     phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
  385.    
  386.     uint32_t i;
  387.     for (i = 0; i < 8192; i++) {
  388.         if ((phte[i].v) && (phte[i].vsid >= (asid << 4)) &&
  389.             (phte[i].vsid < ((asid << 4) + 16)))
  390.             phte[i].v = 0;
  391.     }
  392.     tlb_invalidate_all();
  393. }
  394.  
  395.  
  396. void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
  397. {
  398.     // TODO
  399.     tlb_invalidate_all();
  400. }
  401.  
  402.  
  403. #define PRINT_BAT(name, ureg, lreg) \
  404.     asm volatile ( \
  405.         "mfspr %0," #ureg "\n" \
  406.         "mfspr %1," #lreg "\n" \
  407.         : "=r" (upper), "=r" (lower) \
  408.     ); \
  409.     mask = (upper & 0x1ffc) >> 2; \
  410.     if (upper & 3) { \
  411.         uint32_t tmp = mask; \
  412.         length = 128; \
  413.         while (tmp) { \
  414.             if ((tmp & 1) == 0) { \
  415.                 printf("ibat[0]: error in mask\n"); \
  416.                 break; \
  417.             } \
  418.             length <<= 1; \
  419.             tmp >>= 1; \
  420.         } \
  421.     } else \
  422.         length = 0; \
  423.     printf(name ": page=%.*p frame=%.*p length=%d KB (mask=%#x)%s%s\n", \
  424.         sizeof(upper) * 2, upper & 0xffff0000, sizeof(lower) * 2, \
  425.         lower & 0xffff0000, length, mask, \
  426.         ((upper >> 1) & 1) ? " supervisor" : "", \
  427.         (upper & 1) ? " user" : "");
  428.  
  429.  
  430. void tlb_print(void)
  431. {
  432.     uint32_t sr;
  433.    
  434.     for (sr = 0; sr < 16; sr++) {
  435.         uint32_t vsid;
  436.         asm volatile (
  437.             "mfsrin %0, %1\n"
  438.             : "=r" (vsid)
  439.             : "r" (sr << 28)
  440.         );
  441.         printf("vsid[%d]: VSID=%.*p (ASID=%d)%s%s\n", sr,
  442.             sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4,
  443.             ((vsid >> 30) & 1) ? " supervisor" : "",
  444.             ((vsid >> 29) & 1) ? " user" : "");
  445.     }
  446.    
  447.     uint32_t upper;
  448.     uint32_t lower;
  449.     uint32_t mask;
  450.     uint32_t length;
  451.    
  452.     PRINT_BAT("ibat[0]", 528, 529);
  453.     PRINT_BAT("ibat[1]", 530, 531);
  454.     PRINT_BAT("ibat[2]", 532, 533);
  455.     PRINT_BAT("ibat[3]", 534, 535);
  456.    
  457.     PRINT_BAT("dbat[0]", 536, 537);
  458.     PRINT_BAT("dbat[1]", 538, 539);
  459.     PRINT_BAT("dbat[2]", 540, 541);
  460.     PRINT_BAT("dbat[3]", 542, 543);
  461. }
  462.  
  463. /** @}
  464.  */
  465.