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  1. /*
  2.  * Copyright (c) 2003-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup mips32
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch.h>
  36. #include <arch/boot.h>
  37. #include <arch/cp0.h>
  38. #include <arch/exception.h>
  39. #include <mm/as.h>
  40.  
  41. #include <userspace.h>
  42. #include <arch/console.h>
  43. #include <memstr.h>
  44. #include <proc/thread.h>
  45. #include <proc/uarg.h>
  46. #include <print.h>
  47. #include <syscall/syscall.h>
  48. #include <sysinfo/sysinfo.h>
  49.  
  50. #include <arch/interrupt.h>
  51. #include <arch/drivers/arc.h>
  52. #include <console/chardev.h>
  53. #include <arch/barrier.h>
  54. #include <arch/debugger.h>
  55. #include <genarch/fb/fb.h>
  56. #include <genarch/fb/visuals.h>
  57. #include <macros.h>
  58. #include <ddi/device.h>
  59.  
  60. #include <arch/asm/regname.h>
  61.  
  62. /* Size of the code jumping to the exception handler code
  63.  * - J+NOP
  64.  */
  65. #define EXCEPTION_JUMP_SIZE    8
  66.  
  67. #define TLB_EXC ((char *) 0x80000000)
  68. #define NORM_EXC ((char *) 0x80000180)
  69. #define CACHE_EXC ((char *) 0x80000100)
  70.  
  71.  
  72. /* Why the linker moves the variable 64K away in assembler
  73.  * when not in .text section ????????
  74.  */
  75. uintptr_t supervisor_sp __attribute__ ((section (".text")));
  76. /* Stack pointer saved when entering user mode */
  77. /* TODO: How do we do it on SMP system???? */
  78. bootinfo_t bootinfo __attribute__ ((section (".text")));
  79.  
  80. void arch_pre_main(void)
  81. {
  82.     /* Setup usermode */
  83.     init.cnt = bootinfo.cnt;
  84.    
  85.     uint32_t i;
  86.    
  87.     for (i = 0; i < bootinfo.cnt; i++) {
  88.         init.tasks[i].addr = bootinfo.tasks[i].addr;
  89.         init.tasks[i].size = bootinfo.tasks[i].size;
  90.     }
  91. }
  92.  
  93. void arch_pre_mm_init(void)
  94. {
  95.     /* It is not assumed by default */
  96.     interrupts_disable();
  97.    
  98.     /* Initialize dispatch table */
  99.     exception_init();
  100.     arc_init();
  101.  
  102.     /* Copy the exception vectors to the right places */
  103.     memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
  104.     smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
  105.     memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
  106.     smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
  107.     memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
  108.     smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
  109.    
  110.     /*
  111.      * Switch to BEV normal level so that exception vectors point to the
  112.      * kernel. Clear the error level.
  113.      */
  114.     cp0_status_write(cp0_status_read() &
  115.         ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
  116.  
  117.     /*
  118.      * Mask all interrupts
  119.      */
  120.     cp0_mask_all_int();
  121.        
  122.     debugger_init();
  123. }
  124.  
  125. void arch_post_mm_init(void)
  126. {
  127.     interrupt_init();
  128.     console_init(device_assign_devno());
  129. #ifdef CONFIG_FB
  130.     /* GXemul framebuffer */
  131.     fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8);
  132. #endif
  133.     sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1);
  134. }
  135.  
  136. void arch_post_cpu_init(void)
  137. {
  138. }
  139.  
  140. void arch_pre_smp_init(void)
  141. {
  142. }
  143.  
  144. void arch_post_smp_init(void)
  145. {
  146. }
  147.  
  148. void userspace(uspace_arg_t *kernel_uarg)
  149. {
  150.     /* EXL = 1, UM = 1, IE = 1 */
  151.     cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
  152.         cp0_status_um_bit | cp0_status_ie_enabled_bit));
  153.     cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
  154.     userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
  155.         (uintptr_t) kernel_uarg->uspace_uarg,
  156.         (uintptr_t) kernel_uarg->uspace_entry);
  157.    
  158.     while (1)
  159.         ;
  160. }
  161.  
  162. /** Perform mips32 specific tasks needed before the new task is run. */
  163. void before_task_runs_arch(void)
  164. {
  165. }
  166.  
  167. /** Perform mips32 specific tasks needed before the new thread is scheduled. */
  168. void before_thread_runs_arch(void)
  169. {
  170.     supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
  171.         SP_DELTA];
  172. }
  173.  
  174. void after_thread_ran_arch(void)
  175. {
  176. }
  177.  
  178. /** Set thread-local-storage pointer
  179.  *
  180.  * We have it currently in K1, it is
  181.  * possible to have it separately in the future.
  182.  */
  183. unative_t sys_tls_set(unative_t addr)
  184. {
  185.     return 0;
  186. }
  187.  
  188. void arch_reboot(void)
  189. {
  190.     if (!arc_reboot())
  191.         ___halt();
  192.    
  193.     while (1)
  194.         ;
  195. }
  196.  
  197. /** @}
  198.  */
  199.