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  1. /*
  2.  * Copyright (c) 2005 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup ia64   
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. /** Interval Timer driver. */
  36.  
  37. #include <arch/drivers/it.h>
  38. #include <arch/interrupt.h>
  39. #include <arch/register.h>
  40. #include <arch/asm.h>
  41. #include <arch/barrier.h>
  42. #include <time/clock.h>
  43. #include <ddi/irq.h>
  44. #include <ddi/device.h>
  45. #include <arch.h>
  46.  
  47. #define IT_SERVICE_CLOCKS 64
  48.  
  49. static irq_t it_irq;
  50.  
  51. static irq_ownership_t it_claim(void);
  52. static void it_interrupt(irq_t *irq, void *arg, ...);
  53.  
  54. /** Initialize Interval Timer. */
  55. void it_init(void)
  56. {
  57.     cr_itv_t itv;
  58.  
  59.     irq_initialize(&it_irq);
  60.     it_irq.inr = INTERRUPT_TIMER;
  61.     it_irq.devno = device_assign_devno();
  62.     it_irq.claim = it_claim;
  63.     it_irq.handler = it_interrupt;
  64.     irq_register(&it_irq);
  65.  
  66.     /* initialize Interval Timer external interrupt vector */
  67.     itv.value = itv_read();
  68.     itv.vector = INTERRUPT_TIMER;
  69.     itv.m = 0;
  70.     itv_write(itv.value);
  71.  
  72.     /* set Interval Timer Counter to zero */
  73.     itc_write(0);
  74.    
  75.     /* generate first Interval Timer interrupt in IT_DELTA ticks */
  76.     itm_write(IT_DELTA);
  77.  
  78.     /* propagate changes */
  79.     srlz_d();
  80. }
  81.  
  82. /** Always claim ownership for this IRQ.
  83.  *
  84.  * Other devices are responsible to avoid using INR 0.
  85.  *
  86.  * @return Always IRQ_ACCEPT.
  87.  */
  88. irq_ownership_t it_claim(void)
  89. {
  90.     return IRQ_ACCEPT;
  91. }
  92.  
  93. /** Process Interval Timer interrupt. */
  94. void it_interrupt(irq_t *irq, void *arg, ...)
  95. {
  96.     int64_t c;
  97.     int64_t m;
  98.    
  99.     eoi_write(EOI);
  100.    
  101.     m = itm_read();
  102.    
  103.     while (1) {
  104.         c = itc_read();
  105.         c += IT_SERVICE_CLOCKS;
  106.  
  107.         m += IT_DELTA;
  108.         if (m - c < 0)
  109.             CPU->missed_clock_ticks++;
  110.         else
  111.             break;
  112.     }
  113.    
  114.     itm_write(m);
  115.     srlz_d();               /* propagate changes */
  116.    
  117.     clock();
  118. }
  119.  
  120. /** @}
  121.  */
  122.