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  1. /*
  2.  * Copyright (c) 2007 Pavel Jancik
  3.  * Copyright (c) 2007 Michal Kebrt
  4.  * All rights reserved.
  5.  *
  6.  * Redistribution and use in source and binary forms, with or without
  7.  * modification, are permitted provided that the following conditions
  8.  * are met:
  9.  *
  10.  * - Redistributions of source code must retain the above copyright
  11.  *   notice, this list of conditions and the following disclaimer.
  12.  * - Redistributions in binary form must reproduce the above copyright
  13.  *   notice, this list of conditions and the following disclaimer in the
  14.  *   documentation and/or other materials provided with the distribution.
  15.  * - The name of the author may not be used to endorse or promote products
  16.  *   derived from this software without specific prior written permission.
  17.  *
  18.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  27.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28.  */
  29.  
  30.  
  31. /** @addtogroup arm32boot
  32.  * @{
  33.  */
  34. /** @file
  35.  *  @brief Memory management used while booting the kernel.
  36.  *
  37.  *  So called "section" paging is used while booting the kernel. The term
  38.  *  "section" comes from the ARM architecture specification and stands for the
  39.  *  following: one-level paging, 1MB sized pages, 4096 entries in the page
  40.  *  table.
  41.  */
  42.  
  43.  
  44. #ifndef BOOT_arm32__MM_H
  45. #define BOOT_arm32__MM_H
  46.  
  47.  
  48. #ifndef __ASM__
  49. #include "types.h"
  50. #endif
  51.  
  52.  
  53. /** Frame width. */
  54. #define FRAME_WIDTH         20
  55.  
  56. /** Frame size. */
  57. #define FRAME_SIZE          (1 << FRAME_WIDTH)
  58.  
  59. /** Page size in 2-level paging which is switched on later after the kernel
  60.  * initialization.
  61.  */
  62. #define KERNEL_PAGE_SIZE        (1 << 12)
  63.  
  64.  
  65. #ifndef __ASM__
  66. /** Converts kernel address to physical address. */
  67. #   define KA2PA(x)         (((uintptr_t) (x)) - 0x80000000)
  68. /** Converts physical address to kernel address. */
  69. #   define PA2KA(x)         (((uintptr_t) (x)) + 0x80000000)
  70. #else
  71. #   define KA2PA(x)         ((x) - 0x80000000)
  72. #   define PA2KA(x)         ((x) + 0x80000000)
  73. #endif
  74.  
  75.  
  76. /** Number of entries in PTL0. */
  77. #define PTL0_ENTRIES            (1 << 12)   /* 4096 */
  78.  
  79. /** Size of an entry in PTL0. */
  80. #define PTL0_ENTRY_SIZE         4
  81.  
  82. /** Returns number of frame the address belongs to. */
  83. #define ADDR2PFN(addr)          (((uintptr_t) (addr)) >> FRAME_WIDTH)
  84.  
  85. /** Describes "section" page table entry (one-level paging with 1MB sized pages). */  
  86. #define PTE_DESCRIPTOR_SECTION      0x2
  87.  
  88. /** Page table access rights: user - no access, kernel - read/write. */
  89. #define PTE_AP_USER_NO_KERNEL_RW    0x1
  90.  
  91.  
  92. #ifndef __ASM__
  93.  
  94.  
  95. /** Page table level 0 entry - "section" format is used (one-level paging, 1MB
  96.  * sized pages). Used only while booting the kernel.
  97.  */
  98. typedef struct {
  99.     unsigned descriptor_type : 2;
  100.     unsigned bufferable : 1;
  101.     unsigned cacheable : 1;
  102.     unsigned impl_specific : 1;
  103.     unsigned domain : 4;
  104.     unsigned should_be_zero_1 : 1;
  105.     unsigned access_permission : 2;    
  106.     unsigned should_be_zero_2 : 8;
  107.     unsigned section_base_addr : 12;
  108. } __attribute__ ((packed)) pte_level0_section_t;
  109.  
  110.  
  111. /** Page table that holds 1:1 virtual to physical mapping used while booting the
  112.  * kernel.
  113.  */
  114. extern pte_level0_section_t page_table[PTL0_ENTRIES];
  115.  
  116. extern void mmu_start(void);
  117.  
  118.  
  119. /** Enables paging. */
  120. static inline void enable_paging()
  121. {
  122.     /* c3 - each two bits controls access to the one of domains (16)
  123.      *      0b01 - behave as a client (user) of a domain
  124.      */
  125.     asm volatile (
  126.         /* behave as a client of domains */
  127.         "ldr r0, =0x55555555\n"
  128.         "mcr p15, 0, r0, c3, c0, 0\n"
  129.  
  130.         /* current settings */
  131.         "mrc p15, 0, r0, c1, c0, 0\n"
  132.  
  133.         /* mask to enable paging */
  134.         "ldr r1, =0x00000001\n"
  135.         "orr r0, r0, r1\n"
  136.  
  137.         /* store settings */
  138.         "mcr p15, 0, r0, c1, c0, 0\n"
  139.         :
  140.         :
  141.         : "r0", "r1"
  142.     );
  143. }
  144.  
  145.  
  146. /** Sets the address of level 0 page table to CP15 register 2.
  147.  *
  148.  * @param pt Address of a page table to set.
  149.  */  
  150. static inline void set_ptl0_address(pte_level0_section_t* pt)
  151. {
  152.     asm volatile (
  153.         "mcr p15, 0, %0, c2, c0, 0\n"
  154.         :
  155.         : "r" (pt)
  156.     );
  157. }
  158.  
  159.  
  160. #endif
  161.  
  162. #endif
  163.  
  164. /** @}
  165.  */
  166.  
  167.