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  1. /*
  2.  * Copyright (c) 2005 Martin Decky
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup ppc32  
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #ifndef KERN_ppc32_ASM_H_
  36. #define KERN_ppc32_ASM_H_
  37.  
  38. #include <arch/types.h>
  39. #include <typedefs.h>
  40. #include <config.h>
  41.  
  42. /** Enable interrupts.
  43.  *
  44.  * Enable interrupts and return previous
  45.  * value of EE.
  46.  *
  47.  * @return Old interrupt priority level.
  48.  */
  49. static inline ipl_t interrupts_enable(void)
  50. {
  51.     ipl_t v;
  52.     ipl_t tmp;
  53.    
  54.     asm volatile (
  55.         "mfmsr %0\n"
  56.         "mfmsr %1\n"
  57.         "ori %1, %1, 1 << 15\n"
  58.         "mtmsr %1\n"
  59.         : "=r" (v), "=r" (tmp)
  60.     );
  61.     return v;
  62. }
  63.  
  64. /** Disable interrupts.
  65.  *
  66.  * Disable interrupts and return previous
  67.  * value of EE.
  68.  *
  69.  * @return Old interrupt priority level.
  70.  */
  71. static inline ipl_t interrupts_disable(void)
  72. {
  73.     ipl_t v;
  74.     ipl_t tmp;
  75.    
  76.     asm volatile (
  77.         "mfmsr %0\n"
  78.         "mfmsr %1\n"
  79.         "rlwinm %1, %1, 0, 17, 15\n"
  80.         "mtmsr %1\n"
  81.         : "=r" (v), "=r" (tmp)
  82.     );
  83.     return v;
  84. }
  85.  
  86. /** Restore interrupt priority level.
  87.  *
  88.  * Restore EE.
  89.  *
  90.  * @param ipl Saved interrupt priority level.
  91.  */
  92. static inline void interrupts_restore(ipl_t ipl)
  93. {
  94.     ipl_t tmp;
  95.    
  96.     asm volatile (
  97.         "mfmsr %1\n"
  98.         "rlwimi  %0, %1, 0, 17, 15\n"
  99.         "cmpw 0, %0, %1\n"
  100.         "beq 0f\n"
  101.         "mtmsr %0\n"
  102.         "0:\n"
  103.         : "=r" (ipl), "=r" (tmp)
  104.         : "0" (ipl)
  105.         : "cr0"
  106.     );
  107. }
  108.  
  109. /** Return interrupt priority level.
  110.  *
  111.  * Return EE.
  112.  *
  113.  * @return Current interrupt priority level.
  114.  */
  115. static inline ipl_t interrupts_read(void)
  116. {
  117.     ipl_t v;
  118.    
  119.     asm volatile (
  120.         "mfmsr %0\n"
  121.         : "=r" (v)
  122.     );
  123.     return v;
  124. }
  125.  
  126. /** Return base address of current stack.
  127.  *
  128.  * Return the base address of the current stack.
  129.  * The stack is assumed to be STACK_SIZE bytes long.
  130.  * The stack must start on page boundary.
  131.  */
  132. static inline uintptr_t get_stack_base(void)
  133. {
  134.     uintptr_t v;
  135.    
  136.     asm volatile (
  137.         "and %0, %%sp, %1\n"
  138.         : "=r" (v)
  139.         : "r" (~(STACK_SIZE - 1))
  140.     );
  141.     return v;
  142. }
  143.  
  144. static inline void cpu_sleep(void)
  145. {
  146. }
  147.  
  148. void cpu_halt(void);
  149. void asm_delay_loop(uint32_t t);
  150.  
  151. extern void userspace_asm(uintptr_t uspace_uarg, uintptr_t stack, uintptr_t entry);
  152.  
  153. static inline void pio_write_8(ioport8_t *port, uint8_t v)
  154. {
  155.     *port = v; 
  156. }
  157.  
  158. static inline void pio_write_16(ioport16_t *port, uint16_t v)
  159. {
  160.     *port = v; 
  161. }
  162.  
  163. static inline void pio_write_32(ioport32_t *port, uint32_t v)
  164. {
  165.     *port = v; 
  166. }
  167.  
  168. static inline uint8_t pio_read_8(ioport8_t *port)
  169. {
  170.     return *port;
  171. }
  172.  
  173. static inline uint16_t pio_read_16(ioport16_t *port)
  174. {
  175.     return *port;
  176. }
  177.  
  178. static inline uint32_t pio_read_32(ioport32_t *port)
  179. {
  180.     return *port;
  181. }
  182.  
  183. #endif
  184.  
  185. /** @}
  186.  */
  187.