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  1. /*
  2.  * Copyright (c) 2005 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup ia64
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #ifndef KERN_ia64_CPU_H_
  36. #define KERN_ia64_CPU_H_
  37.  
  38. #include <arch/types.h>
  39. #include <arch/register.h>
  40. #include <arch/asm.h>
  41.  
  42. #define FAMILY_ITANIUM  0x7
  43. #define FAMILY_ITANIUM2 0x1f
  44.  
  45. typedef struct {
  46.     uint64_t cpuid0;
  47.     uint64_t cpuid1;
  48.     cpuid3_t cpuid3;
  49. } cpu_arch_t;
  50.  
  51. /** Read CPUID register.
  52.  *
  53.  * @param n CPUID register number.
  54.  *
  55.  * @return Value of CPUID[n] register.
  56.  */
  57. static inline uint64_t cpuid_read(int n)
  58. {
  59.     uint64_t v;
  60.    
  61.     asm volatile ("mov %0 = cpuid[%1]\n" : "=r" (v) : "r" (n));
  62.    
  63.     return v;
  64. }
  65.  
  66. #endif
  67.  
  68. /** @}
  69.  */
  70.